Planar waveguide PLC is an abbreviation for Planar Lightwave Circuit, referring to planar waveguide technology. Several years ago, planar waveguide technology enabled photon transmission within a wafer and has been widely used in WDM systems, primarily in arrayed waveguide grating (AWG) multiplexing/demultiplexing modules. Recently, Dr. An Junming from Henan Shijia Photonics Technology Co., Ltd. published "Current Status and Prospects of PLC Passive Optical Devices," outlining the current technological status of PLC passive optical devices.
The first type of PLC passive optical device technology
The first category is wavelength division multiplexers - planar optical waveguide devices, which are further divided into several major categories: etched diffraction gratings (EDG), microring resonator demultiplexers, arrayed waveguide gratings (AWG), and photonic crystal demultiplexers.
Dr. An also introduced the working principle of AWG, where AWG chips are key chips for backbone networks, data centers, and optical interconnects. The performance parameters of AWG chips vary depending on the material system. For example, silicon dioxide waveguides have a refractive index difference of 0.75%, a waveguide size of 6mm x 6mm, a bending radius of 5mm, and a 40-channel chip size of 45mm x 20mm. Their biggest advantage is low loss when used alone. SOI waveguides have a refractive index difference of 40%, a waveguide size of 500nm x 200nm, and a bending radius of 5mm. Their 16-channel chip size is 580mm x 170mm, and they are used in integrated applications, requiring submicron fabrication, thus making coupling more difficult. InGaAsP/InP waveguides have a size of 2.5mm x 0.5mm, a bending radius of 500mm, and are also used in integrated applications, with slightly higher loss but also a higher price.
Silicon-based silicon dioxide AWGs need to overcome three major challenges: uniform material growth, phase control to reduce crosstalk, and annealing stress compensation, with a maximum channel count of up to 512 channels.
The waveguide size of Si nanowire waveguide AWG is between 300nm and 500nm. Ghent University has fabricated an 8-channel, 400GHz silicon nanowire AWG with a size of only 200mm′350mm, an insertion loss of only -1.1dB and a crosstalk of -25dB.
The key processes for silicon nanowire AWGs lie in electron beam lithography or deep ultraviolet lithography and ICP dry etching, which require overcoming three major challenges: uniformity of dense nanowire waveguides in EB lithography, EB writing field splicing problems (disconnection or misalignment), and smoothness of sidewalls in EB lithography and ICP etching.
The 64-channel, 50GHz InPAWG has a bandgap of 1.05mm, a GaInAsP thickness of 0.5mm, and is covered by a 1.5mm thick InP layer. The deep-ridge waveguide has a width of 2.55mm and an etching depth of 4.5mm. The NTT employs a deep-ridge structure to achieve polarization independence, with dimensions of 3.6mm x 7.0mm; the input/output waveguide width is 4mm; the output waveguide spacing is 25mm; the array waveguide bending radius is 500mm; the input/output waveguide bending radius is 250mm; the insertion loss is between 14.4-16.4dB, and the crosstalk is less than -20dB.
The second type of PLC passive optical device technology
The second type is the PLC optical splitter, a core photonic device for fiber-to-the-home (FTTH). PLC planar waveguide optical splitters utilize highly integrated fabrication technology, offering up to 128 splitters. They employ photolithography, growth, and dry etching processes to form buried optical waveguides on a quartz substrate, achieving optical power distribution. This is considered the optimal technology for optical splitter production. Companies possessing this technology internationally include NTT, AiDi, Hitachi Cable, Wooriro, PPI, Fi-Ra, Neon, Corecross, QNIX, and Enablence. Another type uses glass-based ion-exchange fabrication technology. This technology is simpler and requires less equipment investment. International companies using this technology include Teem Photonics (France) and ColorChip (Israel). Domestically, it has been reported that Zhejiang University has also mastered this technology.
Currently, the wafer fabrication process for PLC optical splitters consists of 6 major steps and 19 processes. These are: core region growth-annealing, hard mask growth, photolithography (coating, pre-baking, exposure, development, post-baking), hard mask etching, photoresist removal, core region etching, hard mask removal, cleaning, cladding growth, and annealing (repeated multiple times).
The third type of PLC passive optical device technology
The third type is the hybrid integration of passive and active functional devices, including two integration methods: AWG integrated with tunable attenuator (VOA) and AWG integrated with thermo-optical switch optical add-drop device (OADM).
Silicon dioxide platform hybrid integration includes two methods: LD flip-chip and PD side-mount. On-chip flip-chip packaging modules, however, belong to SOI platform hybrid integration, involving both LD flip-chip and PD surface-mount processes, one less process than the silicon dioxide platform.
Hybrid integration process - LD flip-chip bonding uses a two-sided step marking method, SOI platform hybrid integration LD flip-chip
Hybrid integration process - PD surface mount, using surface detectors, while NTT previously used waveguide detectors. Compared to the two detectors, surface detectors have a larger alignment tolerance and simplify the process.
The fourth category of PLC passive optical device technology
The fourth type is the monolithic integration of SOI nanowires (AWG) and Ge detectors, which belongs to the category of hybrid silicon-based devices and monolithic integration.
The fifth category of PLC passive optical device technology
The fifth type is InP-based monolithic integrated circuits (PICs), with Infinera being a global leader in PIC integrated chips. The KeyInnovation PIC, an InP-based monolithic integrated circuit, represents a technological innovation, belonging to active photonic integration. It features small size, low power consumption, and high reliability, enabling digital bandwidth and providing flexibility in deployment and management.
Currently, photonic integration has achieved IP-based transmission, single-etching, large-scale InP photonic integration, 100Gb/s WDM system capacity per chip, and 62 discrete Tx & Rx units integrated in a pair of PICs.
InfineraInP-based integration achieves a 30-fold reduction in fiber coupling frequency, a 3-fold reduction in space occupation, and a 50% reduction in power consumption, demonstrating significant advantages.
Currently, China's optical communication industry chain boasts strong capabilities in system integration, with Huawei, ZTE, and Peaklink ranking among the world's leading companies. However, it's undeniable that my country's upstream chip technology is relatively weak; only low-end active chips can be produced domestically, while high-end chips are entirely dependent on imports. China's strength in module manufacturing is relatively high, with companies like Accelink and O-Net being prominent examples. Overall, China is a major packaging nation, primarily focused on assembly. As is well known, the foundation of the optical communication industry chain lies in chips; only by mastering high-end chip integration technology can the entire industry chain extend effectively.
