introduction
According to the Nyquist algorithm, describing a sine wave as a discrete quantity requires at least two points of waveform amplitude values. However, in practical engineering applications, to ensure that signal distortion meets the basic requirements of the system, at least 2.5 discrete amplitude points are needed to describe a sine wave signal of one period. If the system's modulated signal is to achieve a higher quality, then eight discrete amplitude points are required.
For example, a digital modulation system with a carrier frequency of 70MHz must output digital waveforms at a signal rate of 175–560MHz. If the system's mid-frequency is fixed at 100MHz, the amplitude must be output at a signal rate of 250–800MHz. Generating such high-speed modulation waveforms presents certain difficulties with current digital device technology. Although D/A converters have reached speeds exceeding 1GHz, another crucial digital signal processor component, the FPGA, struggles to output the discrete amplitude points corresponding to the signal waveform at such signal rates. Furthermore, the high signal speed complicates the signal connection between the FPGA and the D/A converter. Ensuring signal integrity while minimizing in-board crosstalk caused by high-speed signals leads to increasingly complex PCB design.
Therefore, a dedicated modulation chip with a high core speed is used, so that the generation, processing, control, and transmission of high-speed signals are completed within a single chip, avoiding the technical difficulties and PCB design complexity caused by generating high-speed data streams using FPGAs. Analog Devices' AD9957 high-speed digital upconverter, designed for the communications market, is a high-performance chip with universal applicability for high-speed digital modulation.
1. Basic Technical Characteristics of AD9957 Digital Up-Inverter
1.1 Basic Technical Specifications
The AD9957 integrates a large number of hardware resources, including a quadrature digital up-converter, filters, clock multipliers, a D/A converter, a gain controller, parameter registers, waveform storage RAM, and an SPI interface controller. Various complex waveforms can be generated by configuring its internal signal parameter registers. The basic performance parameters of the AD9957 core are as follows:
1GSPS internal clock rate, maximum analog output signal frequency of 400MHz; 1GSPS synchronous clock, 14b D/A output; phase noise less than 125dBc/Hz (400MHz); 8 programmable keyed waveform storage registers (keyed amplitude, frequency, phase); quadrature signal input rate of 250MHz/18b; three programmable operating modes: quadrature modulation mode; single-tone mode; interpolated DAC mode.
As shown in the above technical specifications, to generate a 100MHz carrier frequency intermediate frequency modulated signal, the AD9957, driven by the highest core clock, can output 10 discrete amplitude points per sine wave cycle, exceeding the 8 discrete amplitude points required for high-quality waveforms. Furthermore, the 8 keyed waveform storage registers can switch the stored waveforms via control signals to achieve various high-speed frequency and phase modulation signals such as MSK, BPSK, QPSK, 8P-SK, and MFSK. The 14-bit D/A converter can achieve an output signal dynamic range of 84dB. In quadrature modulation mode, the maximum baseband bitstream input rate can reach 250MSPS (I/Q channels combined).
1.2 Working principle of quadrature modulation
Quadrature modulation is the basic operating mode of AD9957, as shown in Figure 1.
The 18-bit I-channel (in-phase baseband stream) and 18-bit Q-channel (quadrature baseband stream) data are updated alternately in real time. A single internal sample can extract both I and Q data into an internal register. The AD9957 provides local digital oscillators with sin and cosine oscillations, which are multiplied by the I and Q input data streams respectively to generate quadrature modulated data streams, which are then summed, as shown in the following equation:
Under the control of the amplitude coefficient, the quadrature data stream is converted into an analog signal output via D/A conversion. The quadrature method can achieve carrier modulation for most frequency modulation, phase modulation, and amplitude modulation signals. Taking BPSK (Binary Phase Shift Keying) signals as an example, to make the carrier phase change between [0, π] under the control of the input code stream with an angular frequency of ωc, it can be seen from the above formula that to generate a BPSK signal, the quadrature path baseband code stream Q should always be 0, while the in-phase path baseband code stream should change between its positive and negative maximum values. When I is +MAX, the phase of sin(ω, t) remains unchanged; when I is -MAX, the phase of sin(ωct) is reversed by π.
The generation method of QPSK is similar, but the orthogonal baseband code stream is not zero. The four permutations of I and Q correspond to four different initial phases of the carrier: I=MAX, Q=0, initial phase is 0; I=0, Q=MAX, initial phase is π/2; I=-MAX, Q=0, initial phase is π; I=0, Q=-MAX, initial phase is -π/2.
In quadrature modulation mode, the AD9957 has the capability to generate relatively complex signals. With the input baseband code rate less than 1/4 of the AD9957 core clock, the frequency and phase of the output intermediate frequency signal can be arbitrarily changed by controlling the I and Q input data. Therefore, the spectral characteristics of the signal can be improved by performing front-end filtering on the input baseband code stream. However, the AD9957, which implements carrier modulation using a single-tone method, lacks the ability to generate relatively complex signals because the waveform parameters are difficult to correct in real time after being set only once.
1.3 Working principle of single-tone mode
The single-tone mode is a way for the AD9957 to achieve frequency modulation, phase modulation, and amplitude modulation by storing simple waveform parameters, as shown in Figure 2.
In single-tone modulation mode, the quadrature modulation circuit is disabled. Users can input the desired waveform parameters, including amplitude, phase, and frequency, into the internal related registers via the SPI bus interface. Up to eight different waveforms can be stored. These eight different waveforms can be selected using three PROFILE control signal lines (representing 0 to 7, 8 states) and output from the D/A analog converter. Taking an FSK signal as an example: two different carrier frequencies, f1 and f2, can be quantized into frequency tuning words and input to PROFILE registers 0 and 1 via the SPI interface (inputting to other PROFILE registers is also acceptable, as long as the waveform encoding and addressing are correct). During signal modulation, the PROFILE signal lines are controlled to encode the data, causing the 3-bit binary code to change between (0, 1). The corresponding analog signal waveform output from the D/A converter will then change between the two carrier frequencies under the control of the bitstream.
The digital signal stream output by the AD9957 is generated by phase accumulation, which can ensure the continuity of the carrier phase when switching between two frequencies and prevent the amplitude of higher harmonic components from increasing due to signal phase jumps.
The OSK (Amplitude Shift Keying) signal is crucial for the AD9957 in single-tone operation to achieve carrier modulation. When the system needs to output the modulated signal in pulse mode, the AD9957 can be operated in OSK-enabled mode. In this mode, the output amplitude of the modulated signal is controlled by the OSK signal, varying between 0 and its maximum value, thus outputting the intermediate frequency (IF) modulated signal in pulse format. The IF modulated signal pulse period and pulse width are identical to the OSK signal, but due to internal chip processing delays, the IF modulated signal output lags behind the OSK signal by a few microseconds (a fixed value).
2. Generate modulation signal using AD9957
MSK and BPSK signals are widely used carrier modulation methods in digital communication. These two signal waveforms can be easily generated using the AD9957.
2.1 MSK Modulation Based on Waveform Parameter Control
2.1.1 Characteristics of MSK Modulated Signal
Minimum Frequency Shift Keying (MSK) is an FSK carrier modulation signal modulated with a modulated value of 0.5 and continuous phase. Its characteristics are as follows:
(1) The amplitude of the modulated signal is constant;
(2) The frequency offset of the signal is strictly equal to ±1/4Ts (Ts is the information chip width), and the corresponding modulation index h=(f2-f1)/Ts=1/2;
(3) The signal phase, based on the carrier phase, changes precisely linearly within one symbol period as ±π/2;
(4) During one symbol period, the signal shall include an integer multiple of 1/4 of the carrier period;
(5) The phase of the signal is continuous (without a jump) at the symbol transition time;
(6) The power roll-off rate is fast and the out-of-band radiation is small.
Taking an MSK modulated signal with a center carrier frequency of 63.75MHz and a code rate of 5Mb/s as an example:
(1) The two carrier frequencies are f1=62.5MHz and f2=65MHz, and their modulation index h=(65-62.5)MHz=2.5MHz=1/2 rate.
(2) The number of quarter cycles P of the center carrier frequency of 63.75MHz contained in one chip period (200ns):
P = 0.2/(1/63.75) × (1/4) = 51, which is an integer and satisfies the constraint conditions.
2.1.2 AD9957 waveform parameter control generates MSK modulated signal
In an MSK modulation signal system with a center carrier frequency of 63.75MHz and a code rate of 5Mb/s, the AD9957 can generate the above waveform by controlling its internal registers to switch between modes, as follows:
(1) Generation of kernel clock
The AD9957's core clock can be directly input with a high-frequency clock, or it can be generated by multiplying an external clock using an internal multiplier. The maximum multiplication factor of the internal multiplier is 127 (7b). Using the internal multiplication method, the maximum input clock frequency is 60MHz. If using a 40MHz external clock, multiplied to a 1GHz core clock, the multiplier register parameter should be set to 25.
In practical engineering, it was found that the phase-locked loop circuit used to generate the high-frequency core clock of AD9957 has poor performance and will affect the system signal quality. Therefore, using an external high-frequency clock as the core clock is a better design solution.
(2) Calculation of frequency tuning word
The frequency tuning word (FTW) is a crucial parameter for signal modulation in the AD9957's single-tone mode. For an MSK modulation system with a center carrier frequency of 63.75MHz and a code rate of 5Mb/s, assuming the AD9957's core clock is 1GHz, its two carrier frequency FTWs (62.5MHz and 65MHz) are as follows:
(3) Injection and control of waveform parameters
FTW1 and FTW2 are input to the corresponding registers PROFILE0 and PROFILE1 via the SPI data bus. The system is set to single-tone mode. The external information chip (200ns) changes its state between 0 and 1 (PROFILE1 and 2 clocks are 0) via the control signal lines PROFILE[2:0], thereby achieving real-time switching between the 62.5MHz and 65MHz carrier frequencies to generate MSK modulated signals. In a pulse system, pulse transmission can also be achieved by setting the amplitude parameter of a certain PROFILE register to 0. Similarly, such a pulse system can also be implemented using the MSK method. Generating MSK modulated signals through waveform parameters is a simple and reliable method for generating modulation waveforms using AD9957. This method can also be used to generate BPSK and QPSK phase-modulated signals, except that the parameter controlled by PRO-FILE changes from frequency to phase. However, in single-tone mode, it is difficult to achieve shaping and filtering of the baseband code stream through waveform parameter control, and the spectral characteristics of the signal are relatively poor.
3. Conclusion
Through theoretical analysis and engineering practice, the following conclusions can be drawn: AD9957 is a high-performance digital up-converter. Carrier modulators built with this chip have advantages such as high quality of modulated output signal, low power consumption, simple design, and wide application. It is an ideal digital device for reducing the design difficulty of modulation equipment in various high-speed software wireless communication systems and improving system performance indicators.
