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Limitations of PLC digital input module in detecting pulse signals

2026-04-06 07:51:06 · · #1

1 Introduction

In modern factories, PLC systems are widely used as fundamental equipment for industrial control. Many factory applications require counting pulse signals acquired from the field. While dedicated pulse counting modules can acquire high-speed pulse signals, these modules are expensive. In some applications requiring low-speed pulse signal acquisition, ordinary digital input modules can be used instead. This reduces system costs and complexity, and improves maintainability. However, using ordinary digital input modules raises a question: what is the speed limit of pulse signal acquisition by these modules? What are the constraints? The following analysis, based on AB's ControlLogix 1756 series PLC system, addresses this issue.

Constraints on module response speed

For a digital input module to detect a pulse signal, it must be able to completely acquire the entire process of pulse generation. As shown in Figure 1, the process of a digital input module detecting a pulse signal can be decomposed into three processes.

As shown in Figure 1, the pulse signal that the digital input module can detect must at least meet the following conditions:

(1) Pulse width t1 >> t1;

(2) Pulse period t0 》 t1 + t3;

(3) Pulse interval t2>t3.

Taking the AB 1756-ib16d digital input module as an example, its on time is 1, 2, or 3 ms; its off time is 4, 5, 13, or 22 ms. These different on/off times can be configured by the system. Under the condition of configuring the fastest on/off time, it can be calculated that the 1756-ib16d digital input module can detect pulses with a pulse width of 1 ms and a pulse period of 5 ms. If the pulse width increases by a few milliseconds, the pulse period will increase accordingly by a few milliseconds. The conclusion is as follows: Under ideal conditions, the 1756-ib16d digital input module can distinguish pulse signals with a speed of less than 200 pulses/second and a pulse width greater than 1 ms.

Constraints of scan time in 3PLC system

The working principle of a PLC is time-division scanning. A complete scan cycle of a PLC includes the time for all I/O updates and the time for the PLC program to execute once. The scan time of a PLC system is related to the system network conditions, the number of remote stations, and the signals of the PLC's CPU modules. If the pulse signal detected by the field switch input module is greater than one within a PLC scan cycle, the PLC system will not be able to accurately reflect the number of field pulses.

Figure 2 shows a detailed analysis of how the PLC system judges the detection signals of the digital input module.

The PLC system updates I/O information by scanning. Assuming that at times 0, t1, t2, and t3, the PLC system scans the signal source, as shown in Figure 2:

(1) For pulse signal 1, the PLC system did not detect any pulse signal. It can be concluded that if the pulse signal period t1...

(2) For pulse signal 2, the PLC system also did not detect any pulse signal. This is because the pulse width t0 of pulse signal 2 is...

(3) For pulse signal 3, the pulse width t0 of the pulse signal is greater than the PLC scan period t, and the pulse period t1 is less than the pulse width t0.

(4) For pulse signal 4, the pulse period t1 > the PLC scan period t, the pulse period t1 - pulse width t0 > the PLC scan period t, and the PLC system can detect the correct number of pulses.

For a medium-sized system using AB's ControlLogix 1756-L55 series CPU module, with the ControlNet 1756-CNBR module selected for remote I/O communication, a total of 2000 I/O points, and 6 remote I/O stations, one PLC scan cycle is approximately 40-70ms. Therefore, for this system, the pulse width of the reliably detectable pulse signal should be greater than 70ms, and the minimum time interval between the end of the first pulse signal and the issuance of the second pulse signal should be greater than 70ms.

4. Conclusion

In summary, if a standard digital input module is used instead of a pulse counter module, the primary constraint on the pulse input signal is the PLC system's scan time. For AB PLC systems, pulse signals with a pulse width > 70ms and a minimum time interval greater than 70ms between the end of the first pulse and the start of the second pulse can be reliably received. For other brands of PLC systems, their basic operating principles are consistent with AB's PLC systems; therefore, this conclusion also applies. For pulse signals that do not meet the above conditions, a dedicated pulse counter module must be considered.

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