This article, written by Yu Bin of Hunan Institute of Technology, introduces a servo control system for a DC brushed torque motor based on a TMS320LF2407A DSP. It features high control precision, fast response, and good suppression of excess force in the loading system. 1 Introduction A servo loading system, also known as a simulated load device, falls under the category of servo control systems. Servo loading systems are currently the most commonly used ground dynamic flight simulation equipment, widely applied in aviation and aerospace projects to simulate the aerodynamic loads acting on the load-bearing object during flight. The main functions of the servo loading system in the system are: (1) to actually assess the dynamic working condition of the load-bearing object under approximate actual loads, verifying its feasibility in actual operation; (2) to feed back the dynamic process of the servo motor under loading conditions to the loading loop after adding loads, thereby further refining the granularity of the simulation and improving the confidence and level of the system's simulation results. This article introduces a servo loading system for a DC brushed torque motor based on a DSP. 2. Composition of the Servo Loading System In the motor servo loading system, the actuator torque motor, under the control of the DSP controller, loads the load-bearing object. Figure 1 shows the composition of the loading system, which consists of a torque function generator, DSP controller, amplifier, torque motor, torque sensor, angular displacement sensor, A/D converter, and components related to the servo motor. The torque function generator, based on the real-time acquired angular displacement signal and using the load spectrum, obtains the standard reference input of the torque corresponding to a fixed position of the servo motor through table lookup or calculation. In this system, this function is implemented by the host computer. Since this system only needs to consider the design of the slave computer, the input of the slave computer is assumed to be the standard reference input value of the torque processed by the torque function generator. [IMG=Figure 1 Loading System Structure Diagram]/uploadpic/THESIS/2007/11/2007111614131693366X.jpg[/IMG] Figure 1 Loading System Structure Diagram 3 System Hardware Design In order to ensure the control accuracy required by the design, a digital PWM generator circuit is used for the PWM waveform output in the system design. In order to meet the requirements of a base frequency of 10KHz and a pulse width duty cycle adjustment resolution of 12 bits, a timer of 40MHz or higher is required, that is, the DSP's main frequency needs to reach 40MHz. The TMS320LF2407A can operate at a maximum frequency of 40MHz and integrates a relatively powerful PWM generator circuit, which can also undertake communication, processing and monitoring tasks. Its circuit structure diagram is shown in Figure 2. [IMG=Figure 2 System Circuit Structure Diagram]/uploadpic/THESIS/2007/11/2007111614132778953I.jpg[/IMG] Figure 2 System Circuit Structure Diagram As shown in Figure 2, the entire circuit consists of the following parts: digital input port, TMS320LF2407A controller, AD974 sampling circuit, amplification and execution circuit, and protection circuit, etc. The main operation flow of the circuit is as follows: The host computer latches the output digital value through the DO board, and at the same time, it uses an interrupt to stimulate the TMS320LF2407A controller to read the value. After the TMS320LF2407A reads the new value, it outputs a PWM waveform after being corrected by a certain algorithm. The output PWM wave is amplified by the subsequent circuit (IR2110) and then drives the bridge MOSFET (IRF540N) switching circuit to realize the torque motor output torque control. 3.1 Introduction to TMS320LF2407A The architecture of the TMS320 series DSP is designed for real-time signal processing. However, this series of DSP controllers integrates real-time processing capabilities and control peripheral functions, providing an ideal solution for control system applications. Because the TMS320 series DSP has many advantages such as flexible instruction set, flexible internal operation, high-speed computing power, improved parallel structure and effective cost, it has become an ideal choice for many signal processing and control systems. However, based on the TMS320 series DSP, the TMS320 LF2407A also has the following main features: (1) This controller adopts high-performance static CMOS technology, which reduces the chip power supply voltage from the general SV to 3.3V, reducing the power consumption of the controller, making it particularly suitable for field operations; the 40MIPS execution speed shortens the instruction cycle to 25ns, thereby improving the real-time control capability of the control system. (2) Based on the TMS320C2XX DSP CPU core, it ensures that the code of the TMS320LF2407A series DSP is compatible with the code of the TMS320 series DSP. (3) Each of the two transaction manager modules (EVA and EVB) contains: two 6-bit general-purpose timers; eight 16-bit pulse width modulation channels (PWM). This feature facilitates the implementation of various motor controls, such as three-phase inverter control; it can generate symmetrical and asymmetrical PWM waveforms; at the same time, for protection purposes, the PWM output channel is quickly shut down when the external pin PDPINTx is low; programmable PWM dead-time control prevents the MOSFETs of the upper and lower bridge arms of the external PWM output section from simultaneously outputting trigger pulses and burning out the MOSFETs; there are three on-chip capture units; on-chip photoelectric encoder interface; 16-channel 10-bit AID converter. Therefore, the transaction manager is particularly suitable for controlling AC induction motors, brushless DC motors, stepper motors, etc. (4) It has up to 32K words of FLASH program memory, up to 1.5K data/program RAM, 544 words of dual-port RAM (DARAM) and 2K words of single-port RAM (SARAM). The expandable external memory has a total of 192K words, of which the program memory space, data memory space and I/O addressing space are each 64K. (5) The system also has an internally integrated watchdog timer module (WDT) to prevent the program from running out of control or other erroneous operations. (6) The chip also integrates a 10-bit AID converter with a minimum conversion time of 500ns. However, in this design, two 12-bit resolution AID converters were selected according to the real-time requirements of the control to improve the real-time performance of the system control. (7) In addition, this chip also has a serial communication interface (SCI) module, a 16-bit serial peripheral (SPI) interface module; a phase-locked loop-based clock generator; 5 external interrupt sources; and 40 individually programmable or multiplexed general purpose input/output pins (GPIO) modules. 3.2 Digital Input Circuit Design The standard reference input of the DSP from the host computer is a TTL level output via the host computer's parallel latch board. Since the high level of this type of DSP chip is 3.3V, three 74HC245 chips with 5V/3.3V level conversion function are used in the circuit. They serve as level conversion and bus isolation. Two of them are connected in parallel as a 16-bit data input port; the other is used as a control signal input port, facilitating host computer control of this circuit. Because the TMS320LF2407A DSP has independent program memory, data memory, and I/O addressing spaces, and has external space selection signals PS, DS, and IS control pins corresponding to the three external addressing spaces. Because this circuit uses only one external I/O port (i.e., only one external I/O address), IS is used as the selection signal for the external I/O space. The DSP's IS pin is directly connected to the output enable pin OE of two 74HC245 chips used for 16-bit data input ports. This is used for data transmission and isolation between the host computer and the DSP on either side of the 74HC245. The B pins of these two 74HC245 chips are connected to the TMS320 LF2407A's external data bus DO~D15. Data from the host computer only appears on D0~D15 when the TMS320LF2407A performs external I/O space addressing (IS=0). At other times, signal isolation is achieved through high impedance. IS is low throughout the complete external I/O space addressing cycle of the TMS320LF2407A, and the data transmission delay of the selected 74HC245 chip is no more than 7ns. Therefore, the TMS320LF2407A can effectively read data through external I/O addressing. The OE pin of the other 74HC245 is directly connected to a low level to ensure that the control signals from the host computer can reach the DSP unimpeded at all times. Pin A2 (i.e., pin 2 of the 74HC245) receives the interrupt signal from the host computer, and the corresponding output pin B2 is connected to the external interrupt 1 of the TMS320LF2407A, allowing the host computer to notify the TMS320LF2407A to read new data via an interrupt. In interrupt-driven transmission, each time data is output, the host computer first sets A2 to 1, then writes to D0~D15, and then sets D17 to 0, thus sending an interrupt to the TMS320LF2407A. This interrupt-driven approach enables very fast data transmission. For redundancy, pin A1 of the 74HC245 is used as a flag signal input indicating that the host computer's output data has stabilized, and the corresponding output pin B1 is connected to the IOPF6 pin of the TMS320LF2407A for polling communication. In practice, polling has significant drawbacks compared to interrupt-based methods. Polling is considerably less efficient than interrupt-based methods, resulting in a large number of machine cycles being wasted on ineffective loops. If the polling frequency is low, the host computer's output commands cannot be effectively tracked. Furthermore, if the timing of the TMS320LF2407A does not perfectly match the timing period of the host computer, the delay time for command execution will vary. Therefore, interrupt-based methods are preferred here, while polling is only used as a necessary hardware connection. Additionally, pin A3 of this 74HC245 is used as the input for the host computer's direct reset signal to the TMS320LF2407A, enabling in-line control of the TMS320LF2407A's reset. 3.3 PWM Waveform Amplification and Drive Circuit Design Since the high level of the PWM pulse signal output by the TMS320LF2407A is 3.3V, the two output PWM signals must be pulled up to 15V by two 75451 chips to drive the two IR2110 chips. Then, the two IR2110 chips output two pairs of amplified PWM signals to control a bridge switching power amplifier circuit composed of four MOSFETs, realizing power supply on/off and power supply polarity control. Furthermore, when the motor's forward and reverse switching frequency is relatively high, due to the inductive nature of the motor, the di/dt effect causes a certain time delay before the MOSFETs are completely turned off when the turn-off signal appears. However, if the two MOSFETs corresponding to forward rotation are not completely turned off before the two MOSFETs controlling reverse rotation turn on, this results in shoot-through of the MOSFETs in the upper and lower bridge arms, potentially burning out the MOSFETs. Therefore, a discharge circuit should be constructed on the MOSFETs, i.e., a fast recovery diode (also known as a freewheeling diode) is connected in reverse between the drain and source of each MOSFET. Here, the IN4148 fast recovery diode is also selected. Considering the transmission timing, the IR2110 transmission delay is no greater than 150ns; the 75451 transmission delay is no greater than 25ns; the GAL16V8 transmission delay is no greater than 1ns; and the turn-on and turn-off times of the MOSFETs in the bridge circuit are no more than 70ns. It can be assumed that the intermediate transmission links operate relatively quickly. Therefore, during PWM waveform transmission, the rising and falling edge delays caused by intermediate devices are relatively stable. Since the effective variables for PWM waveform control are the fundamental frequency and duty cycle, the distortion effects of the rising and falling edges of the waveform are complementary. At a relatively high level of precision, it can be considered that the waveform has only undergone an overall shift during transmission, and at this level of precision, the effective duty cycle of the final output supply voltage can be considered to be the same as the original PWM waveform's duty cycle. 4. System Software Design In the DSP torque motor loading system based on the TMS320LF2407A, its main function is to track the standard reference input value given by the host computer with high precision, minimizing the excess loading torque caused by the active movement of the load-bearing object. To achieve good tracking performance and generate less excess torque with the support of the above system hardware, a relatively complete control law and a relatively accurate implementation of these control laws are necessary. The software design here is the specific implementation of the designed control laws. Since the TMS320LF2407A has strong data processing capabilities, the implementation of the above controller is entirely possible. At the same time, this device has a simplified instruction set, parallel processing instructions, and high processing speed, enabling the system to track the control quantity in real time. According to the software design concept, the specific design steps are as follows: (1) First, the system is initialized, including setting the interrupt priority, enabling the global interrupt, setting the symbol extension mode, setting the overflow mode, configuring the on-chip DARAM memory, and setting the location of each memory variable used in the program; (2) Second, the control quantity output by the host computer is received in interrupt mode and stored in the memory space set above; (3) The result value (angular displacement and output torque) of the A/D converter is received in interrupt mode and stored in the corresponding storage space; (4) The controller program is designed with angular displacement and output torque as input quantities; (5) The control quantity obtained in the previous step is converted into PWM duty cycle through calculation, and the modulated PWM pulse waveform is output to control the output torque of the motor. The system interrupt program flowchart is shown in Figure 3. [IMG=Figure 3 System Interrupt Program Flowchart]/uploadpic/THESIS/2007/11/2007111614133649438X.jpg[/IMG] Figure 3 System Interrupt Program Flowchart 5 Conclusion Practice has proven that this system has the characteristics of high control accuracy, fast response, and good suppression of excess force on the loaded system. Therefore, this system has strong practical value. Proceedings of the 2nd Servo and Motion Control Forum Proceedings of the 3rd Servo and Motion Control Forum