Zhen Wei and Zheng Enrang from the School of Electrical Engineering at Shaanxi University of Science and Technology elaborated on the control principle of an embedded rocket servo mechanism, studied the embedded intelligent controller of the rocket servo mechanism, and proposed the overall design structure for hardware implementation. The selection of microprocessor unit circuit components and the connection methods of the components in this design are discussed in detail. 1. Composition and Working Principle of Embedded Missile Servo Mechanism Traditional rocket servo mechanisms obtain input commands from the onboard computer, and the transmission signals of the entire system are all analog signals. In contrast, the embedded rocket servo mechanism consists of two main parts: a controller and an actuator. It has a simple structure, a high degree of intelligence, and can be connected as an autonomous node to the rocket control system bus. To achieve bus-based rocket control, we designed a digital servo mechanism controller based on the CAN bus. Its principle block diagram is shown in Figure 1. [IMG=Figure 1 Block Diagram of Digital Rocket Servo Mechanism Controller Based on CAN Bus]/uploadpic/THESIS/2007/11/2007111615181399480U.jpg[/IMG] Figure 1 Block Diagram of Digital Rocket Servo Mechanism Controller Based on CAN Bus The embedded controller plays the roles of communication interface, data acquisition and processing, etc., and is the core of the bus-type digital servo mechanism. Its working principle is as follows: The CAN bus communication module receives the command signal from the CAN bus and sends it to the ARM microprocessor. After the microprocessor decodes and calculates, it outputs a digital signal. After D/A and V/I conversion, it outputs a command current to the servo motor. The servo motor amplifies this signal and drives the gas rudder to rotate through the linkage device. When the gas flow passes through the deflected rudder surface, it generates a control torque on the rocket, thereby eliminating the attitude deviation of the rocket flight. As the gas rudder deflects, the brush of the rudder potentiometer fixed on its shaft also rotates, thereby outputting an electrical signal proportional to the deflection angle as the rudder feedback signal. After A/D conversion, the signal is sent to the microprocessor and combined with the command signal from the CAN bus to jointly control the action of the servo motor. In addition, the rudder potentiometer has two electrically limiting contacts to limit the gas rudder to work within a certain range. When the electrically limiting contacts are closed, a digital input is given to the microprocessor, and the microprocessor controls the servo motor to stop increasing its angle. As can be seen from the above introduction, the rocket servo mechanism controller should have the following main functions: (1) CAN bus communication capability. This is the most basic requirement for the controller. Because the data transmission of the bus-type rocket control system is realized through the CAN bus, the controller must have bus communication capability and be able to ensure that the communication rate, bit error rate, and communication distance are within the required range. (2) AI/AO function. AI is the data acquisition function, which samples the feedback voltage of the rudder potentiometer in real time and combines it with the command signal from the bus to jointly control the action of the servo motor. Moreover, the servo motor action is required to be timely and stable. AO is analog output, which requires the output of the control command voltage for the servo motor, and the output command current after voltage-current conversion. (3) It has DI/DO function. The digital input receives the feedback signal of the servo potentiometer's electric limit contact, and then sends an interrupt request to the microprocessor. The microprocessor responds to the interrupt, and the command current of the control output no longer increases, so that the gas servo deflection angle no longer increases, but jitters near the maximum deflection angle. (4) It has data processing function. The controller receives a signal in CAN protocol format from the bus, which needs to be decoded by the controller, and then the difference operation is performed with the feedback signal of the servo potentiometer. Then, according to a certain control strategy, this control quantity is converted into a corresponding electrical signal and sent to the actuator to control the servo motor. (5) It has a universal serial communication interface. Considering the debugging of the controller and the communication requirements with the host computer, a universal serial port (RS232, RS422, etc.) is still indispensable. 2 Hardware overall structure design of the controller The overall hardware structure of the servo mechanism controller is shown in Figure 2. It is a complete system with a 32-bit ARM microprocessor as the core, and has functions such as data acquisition, object control, and data communication. [IMG=Figure 2 Hardware Composition Structure Diagram of Servo Mechanism Controller]/uploadpic/THESIS/2007/11/20071116152013378969.jpg[/IMG] Figure 2 Hardware Composition Structure Diagram of Servo Mechanism Controller 3 Microprocessor Unit Circuit Design 3.1 Microprocessor Structure and Characteristics The microprocessor used in the controller is the Philips LPC2292 chip, and its internal structure is shown in Figure 3. The LPC2292 is based on a 16/32-bit ARM7TDMI-STM CPU that supports real-time emulation and tracing, and has 256kB of embedded high-speed Flash memory. The 128-bit wide memory interface and unique acceleration architecture enable 32-bit code to run at the maximum clock rate. Applications with strict control over code size can use 16-bit Thumb mode to reduce the code size by more than 30%, with minimal performance loss. [IMG=Figure 3 LPC2292 Internal Structure Block Diagram]/uploadpic/THESIS/2007/11/2007111615213562066U.jpg[/IMG] Figure 3 LPC2292 Internal Structure Block Diagram. Due to its 144-pin package, extremely low power consumption, multiple 32-bit timers, 8-channel 10-bit ADC, 2-channel CAN, PWM channel, and up to 9 external interrupts, the LPC2292 is particularly suitable for automotive, industrial control applications, medical systems, and fault-tolerant maintenance buses. The LPC2292 contains 76 (using external memory) to 112 (monolithic) GPIO ports. With its built-in wide-range serial communication interface, it is also well-suited for communication gateways, protocol converters, and various other types of applications. [IMG=Figure 4 LPC2292 Microprocessor Port Resource Allocation Diagram]/uploadpic/THESIS/2007/11/2007111615230122220K.jpg[/IMG] Figure 4 LPC2292 Microprocessor Port Resource Allocation Diagram 3.2 System Reset (RESET) Circuit Any microprocessor executes its application program in an orderly manner only after a reliable reset. At the same time, the reset circuit is also one of the sensitive parts easily affected by noise interference. Therefore, the reset circuit design requires two things: first, to ensure reliable reset of the entire circuit; and second, to have a certain degree of anti-interference capability. The system reset module provides the LPC2292 with a start signal, which is the beginning of the entire system operation. The wiring diagram of the reset module is shown in Figure 5. The LPC2292 has two reset sources: the RESET pin and the watchdog reset. The RESET pin is a Schmitt trigger input pin with an additional interference filter. Any chip reset caused by a reset source will start the wake-up timer. The reset state will remain until the external reset is removed, and the oscillator starts running. After the oscillator runs for a fixed number of clock cycles, the Flash controller completes its initialization. [IMG=Figure 5 Reset Module Wiring Diagram]/uploadpic/THESIS/2007/11/2007111615261584882E.jpg[/IMG] Figure 5 Reset Module Wiring Diagram. When the internal reset is removed, the processor begins execution from reset vector address 0. At this time, all processor and peripheral registers are initialized to preset values. The purpose of the wake-up timer is to ensure that the analog functions required for the operation of the oscillator and other chips are fully functional before the processor can execute instructions. This is crucial in cases of power-on, various types of resets, and any other reason that causes these functions to be disabled. Since the oscillator and other functions are disabled in power-down mode, the wake-up timer is used to wake the processor from power-down mode. The wake-up timer monitors whether the crystal oscillator can safely begin executing code. When the chip powers on, or when certain events cause the chip to exit power-down mode, the oscillator needs a certain amount of time to generate a signal with sufficient amplitude to drive the clock logic. The duration depends on many factors, including the VDD rise rate (at power-on), the type and electrical characteristics of the crystal oscillator (if a quartz crystal is used), and other external circuitry (e.g., capacitors) and the oscillator's own characteristics under external conditions. 3.3 Debug Interface (JTAG) JTAG (Joint Test Action Group) is an IEEE standard specification. The ARM7TDMI provides three JTAG-type scan chains internally, which can be used to debug and configure embedded ICE-RT logic. The JTAG interface wiring diagram is shown in Figure 6. [IMG=Figure 6 JTAG Debug Interface Wiring Diagram]/uploadpic/THESIS/2007/11/2007111615231794257Z.jpg[/IMG] Figure 6 JTAG Debug Interface Wiring Diagram A JTAG emulator, also known as a JTAG debugger, is a device that performs debugging through the JTAG boundary scan port on the ARM chip. It can communicate with the ARM CPU core through existing JTAG boundary scans, and is a completely non-pluggable (does not occupy on-chip resources) debugging method. It requires no target memory, does not occupy any ports of the target system, and is essential for ordinary resident monitoring software. Furthermore, the target program debugged by JTAG executes on the target board, making the simulation closer to the target hardware. Therefore, the simulation results are closer to the real operating environment, making it the most widely used debugging method. Since the LPC2292 chip integrates JTAG signals, these signal lines can be brought out to expand the JTAG port on the board, enabling communication with a JTAG debugger. 4. Conclusion This paper studies the hardware design of an embedded intelligent controller for a rocket servo mechanism. It proposes an overall scheme for an embedded missile servo structure, analyzes the functional requirements of the missile servo controller, and, starting from this, discusses in detail the microprocessor unit circuit of the controller, which has certain value in engineering practice. (Proceedings of the 2nd Servo and Motion Control Forum, Proceedings of the 3rd Servo and Motion Control Forum)