1. Introduction
The 74LS148 is an 8-line to 3-line priority encoder chip with 8 input signal terminals and 3 output signal terminals. It also has a strobe input terminal S, a strobe output terminal YS, and an extension terminal YEX. The effective levels of the input and output signals, as well as S, YS, and YEX, are all low. When multiple input signals are present, only the signal with the highest priority is encoded. In fact, four 74LS148 chips can be used to form a 32-line to 5-line priority encoder using the S, YS, and YEX terminals.
2. 8-line to 3-line priority encoder 74LS148
The 74LS148 is an 8-line to 3-line priority encoder circuit chip, and its logic diagram is shown in Figure 1. As can be seen from Figure 1, both its input and output active levels are low. The area within the dashed box is the encoder circuit. The additional control circuit composed of gates G1, G2, and G3 is used to expand the circuit's functionality and increase its flexibility. S is the selection input terminal; the encoder can only work normally and encode signals when S=0. When S=1, all output terminals are blocked at a high level, the encoder cannot encode the input signal, and the encoder does not work.
The logical expression for the output can be written from Figure 1:
Figure 18 shows the logic diagram of the 74LS148 8-line to 3-line priority encoder .
Table 174LS148 Function Table
As can be seen from Table 1, under normal operating conditions with S=0, several input terminals (I0 to I7) are allowed to be low simultaneously, meaning there are coded input signals. I7 has the highest priority, and I0 has the lowest priority. When I7=0, regardless of whether other input terminals have input signals (represented by X in the table), the output terminal only provides the code for I7, i.e., Y2Y1Y0=000 (because the effective levels of Y2, Y1, and Y0 are low, so when I7=0, Y2Y1Y0 is 000).
When I7=1 and I6=0, regardless of whether there are input signals at the other input terminals, only I6 is encoded, and the output is Y2Y1Y0=001. The other input states are processed in the same way. Thus, a simplified truth table for encoding a certain low-level input signal by the 74LS148 priority encoder is shown in Table 2.
In Table 2, for example, when I1=0, Y2Y1Y0=110. This means that when I7~I2 are all 1, there is no input signal, and when I1=0 there is an input signal. I0 is either 1 or 0, that is, regardless of whether there is an input signal, I1 is encoded and the output is Y2Y1Y0=110.
Table 2 Simplified Truth Table
Table 332 Simplified Truth Table for 5-Line Priority Encoders
3. How to expand the circuit functionality of 74LS148
Example: Draw the logic diagram of a 32-line to 5-line priority encoder composed of four 8-line to 3-line priority encoders 74LS148. Adding necessary gate circuits is permitted.
Solution: Let the inputs of the 32-line to 5-line priority encoder be I0 to I31, with a valid input level of low. I31 has the highest priority, and I0 has the lowest. The outputs are D4, D3, D2, D1, and D0, with a valid output level of high.
Assume that the four 74LS148 chips used are called (1), (2), (3), and (4).
Let chip (4) have the highest priority and chip (1) have the lowest priority.
Each 74LS148 chip has 8 input terminals I0 to I7 and 3 output terminals Y2, Y1, and Y0. Therefore: I0 to I7 are the input signals of chip (1), I8 to I15 are the input signals of chip (2), I16 to I23 are the input signals of chip (3), and I24 to I31 are the input signals of chip (4).
According to the problem statement, the simplified truth table of this 32-line to 5-line priority encoder is shown in Table 3.
3.1. The relationships between D4, D3, D2, D1, D0 and YEX, Y2, Y1, Y0 respectively.
When the extended terminal YEX=0 for each chip, that is, when YEX=1, it indicates that the chip circuit is working and there is an coded signal input.
(1) As can be seen from Table 3: When D4=1, there is a signal input for chip (3) and chip (4).
Therefore: D4 = YEX4 + YEX3 = YEX4·YEX3 (derived from De Morgan's theorem).
(2) Table 3 also shows that when D3=1, there is a signal input for chip (2) and chip (4).
Therefore: D3 = YEX4 + YEX2 = YEX4·YEX3
(3) Table 3 also shows that when D2=1, there is a signal input for the last four states of each chip. For a single chip, the input signals for the last four states are I4 to I7. Table 2 shows that the output Y2=0 corresponding to the input signals I4 to I7, that is, Y2=1. As long as Y2=1 of any of the four chips, then D2=1.
3.2 Connection between input terminal S and strobe output terminal YS
Since chip (4) has the highest priority, it can encode the input signal as long as there is a signal input at the input terminal of chip (4). Therefore, the strobe input terminal S of chip (4) must always be connected to a low level. Since chip (3) has the next highest priority, it can only encode the signal when there is no low-level signal input at any of the input terminals of chip (4), that is, when the strobe output terminal YS of chip (4) is 0. Therefore, the S terminal of chip (3) should be connected to the YS terminal of chip (4).
Similarly: the strobe input S of chip (2) should be connected to the strobe output YS of chip (3). The S terminal of chip (1) should be connected to the YS terminal of chip (2).
3.3 Draw a logic diagram
Based on the logic expressions of D4, D3, D2, D1, and D0 obtained above, and the connection between S and YS between the chips, the logic diagram of this 32-line to 5-line priority encoder can be drawn as shown in Figure 2.
Figure 2 Logic diagram of a 32-line to 5-line priority encoder
4. Conclusion
When using the 74LS148 chip or expanding its circuit functionality, first and foremost, pay close attention to the cold junction temperature of the chip's input and output terminals. A 10kΩ precision resistor is required to convert the output current into a voltage signal before sending it to the A/D converter. The last input signal of the A/D converter comes from the voltage drop across the sampling resistor R (which is proportional to the electrolytic current).
4. Test Results and Accuracy Analysis
The designed sulfur analyzer was used to perform 10 tests on sample 1 (standard sulfur content of 0.88%) and sample 2 (standard sulfur content of 4.24%), and the test results are shown in Table 1 and Table 2.
As can be seen from the table, the maximum error of the test results for sample 1 is 0.02%, which is lower than the error tolerance (0.05%) for low-sulfur coal (sulfur content below 1%) specified in the national standard; the maximum error of the test results for sample 2 is 0.05%, which is also lower than the error tolerance (0.2%) for high-sulfur coal (sulfur content above 4%) specified in the national standard.
5. Conclusion
Coulometric method is a commonly used method for measuring sulfur content. In the coulometric method, the sulfur content is determined based on the integral of the electrolytic charge. This paper introduces the structure and working principle of a sulfur analyzer based on a USB interface, focusing on the analysis of the instrument's data acquisition module, electrolysis current control module, and furnace temperature control module, and analyzes the measurement accuracy. The analysis results show that the instrument's measurement accuracy meets national standards.
