Bypass capacitors and decoupling capacitors
While reviewing CAN bus documentation today, I suddenly noticed a capacitor connected to ground on the power pin of the TJA1050 CAN transceiver in the CAN schematic. This reminded me of a colleague's comment yesterday that the power supply should be connected to the capacitor before connecting it to the chip's power pin. At the time, I didn't understand, but since I encountered this again today, I started my "happy guessing"...
What exactly is the purpose of this capacitor?
Why is a 0.1uf capacitor used? Is there any requirement for this value?
A quick search on Baidu revealed that it's called a "bypass capacitor," but if placed in another location, it's called a "decoupling capacitor"—amazing!
Next, we'll talk about "bypass capacitors" and "decoupling capacitors": (This sounds a bit like copying from Baidu).
I. Definition and Differences
Bypass capacitor: It is used to filter out high-frequency components in the input signal;
Decoupling capacitor: Also known as a decoupling capacitor, it is used to filter out interference in the output signal.
Both decoupling capacitors and bypass capacitors serve to suppress interference; their names differ depending on their location.
High-frequency bypass capacitors are generally small, typically 0.1uF or 0.01uF depending on the resonant frequency, while decoupling capacitors are generally larger, typically 10uF or more.
II. Function
Decoupling capacitors have two main functions: (1) removing high-frequency signal interference; (2) energy storage. (In fact, capacitors near the chip also have the function of energy storage, which is the second function.)
When high-frequency devices operate, their current is discontinuous and at a very high frequency. There is a distance between the device's VCC and the main power supply. Even if this distance is short, at high frequencies, the impedance Z = i*wL + R, and the inductance of the line, can have a significant impact, causing the device to not receive the required current promptly. Decoupling capacitors can compensate for this deficiency. This is one of the reasons why many circuit boards place a small capacitor at the VCC pin of high-frequency devices (a decoupling capacitor is usually connected in parallel on the VCC pin, so that the AC component is grounded through this capacitor).
Coupling, in essence, refers to the transmission of signals between stages without affecting the static operating points of each stage. High-frequency switching noise generated by active devices during switching propagates along power lines. The main function of decoupling capacitors is to provide a local DC power supply to active devices, reducing the propagation of switching noise on the board and guiding it to ground. From a circuit perspective, there is always a driving source and a driven load. If the load capacitance is large, the driving circuit must charge and discharge the capacitor to complete the signal transition. During steep rise times, the current is large, causing the driving current to absorb a significant amount of power supply current. Due to inductance and resistance in the circuit (especially the inductance on the chip pins, which can cause bounce), this current, relative to normal conditions, is essentially noise and can affect the normal operation of the preceding stage. This is coupling. Decoupling capacitors act like a battery, accommodating the current changes in the driving circuit and preventing mutual coupling interference.
3. Why is a 0.1uf capacitor used? Is there any requirement for this value?
High-frequency switching noise generated by active devices during switching will propagate along the power lines. The main function of decoupling capacitors is to provide a local DC power supply to active devices to reduce the propagation of switching noise on the board and to guide the noise to ground.
Decoupling capacitors serve two purposes between the power supply and ground of an integrated circuit: firstly, they act as energy storage capacitors for the integrated circuit itself, and secondly, they bypass high-frequency noise from the device. A typical decoupling capacitor value in digital circuits is 0.1μF. The typical distributed inductance of this capacitor is 5μH. A 0.1μF decoupling capacitor has a distributed inductance of 5nH, and its parallel resonant frequency is approximately 7MHz. This means it has a good decoupling effect for noise below 10MHz, but almost no effect on noise above 40MHz. 1μF and 10μF capacitors have parallel resonant frequencies above 2MHz and are more effective at removing high-frequency noise. Approximately one charge/discharge capacitor or one energy storage capacitor should be added for every 10 integrated circuits; a 10μF capacitor is recommended. Electrolytic capacitors are best avoided, as their rolled-up structure acts as an inductor at high frequencies. Tantalum or polycarbonate capacitors should be used instead. The selection of decoupling capacitors is not strict. Their capacitance value can be calculated according to C=1/F, that is, 0.1μF for 10MHz and 0.01μF for 100MHz.
In short, both decoupling capacitors and bypass capacitors serve to suppress interference. For the same circuit, bypass capacitors filter out high-frequency noise in the input signal, removing high-frequency spurious signals carried over from the previous stage. Decoupling capacitors, also known as decoupling capacitors, filter out interference in the output signal. Decoupling capacitors are used in amplifier circuits where AC is not required to eliminate self-oscillation and ensure stable amplifier operation.
Part 2: Why do ICs need their own decoupling capacitors?
Why do ICs need their own decoupling capacitors?
To ensure high-frequency input and output.
Every integrated circuit (IC) must use capacitors to connect its power supply pins to ground for two reasons: to prevent noise from affecting its own performance, and to prevent it from transmitting noise and affecting the performance of other circuits.
Power lines, like antennas, can pick up high-frequency (HF) noise from other locations and couple it into the system via electric, magnetic, electromagnetic fields, and direct conduction. HF noise at the power supply can affect the performance of many circuits; therefore, any HF noise present on the IC power supply must be shorted to ground. To achieve this noise shorting, conductors cannot be used because they would cause a DC short circuit and blow a fuse. However, capacitors (typically 1nF to 100nF) can be used, which not only block DC but also provide a short circuit for HF noise.
A 1cm wire or PC trace has an inductance of approximately 8nH (at 5Ω and 100MHz), making it difficult to form a short circuit. Capacitors used for high-frequency short circuits must have low lead and PC trace inductance; therefore, each power supply capacitor must be placed very close to the two pins of the IC it is decoupling from. Choosing capacitors with low internal inductance is also important; ceramic capacitors are typically used.
Many IC circuits generate high-frequency noise at the power supply terminals. This noise must be short-circuited through a capacitor connected across the power supply to prevent it from damaging other parts of the system. Similarly, the length of leads and PC traces is crucial: on the one hand, long leads can act as inductors, making short-circuiting less ideal; on the other hand, long conductors can act as antennas, transmitting high-frequency noise to other parts of the system through electric, magnetic, and electromagnetic fields.
Therefore, each power pin of each IC should be connected to the IC's ground pin via a capacitor with very low inductance. There may be multiple ground pins, and it is very important to use a wide, low-inductance PC trace to bond all the ground pins together to make a single low-impedance equipotential star ground point.
Buffer circuits with and without decoupling (measurement results)
This describes a snubber circuit for driving an RC load with and without decoupling capacitors (C1 and C2). We note that without the decoupling capacitors, the circuit's output signal contains high-frequency (3.8MHz) oscillations. Amplifiers without decoupling capacitors typically exhibit low stability, poor transient response, startup failures, and various other anomalies.
Current with and without decoupling
The inductance of the power supply trace limits transient current. Decoupling capacitors are very close to the device, so the inductance of the current path is very small. During transients, this capacitor can supply a very large amount of current to the device for a very short time. Devices without decoupling capacitors cannot supply transient current, so the internal nodes of the amplifier droop (often called interference). Internal power supply interference in devices without decoupling capacitors can cause discontinuous operation because the internal nodes are not properly biased.
Classification of decoupling capacitors in PCB boards
Decoupling capacitors function as energy storage devices to compensate for voltage drops in integrated circuits or circuit boards. They can be categorized into three types: overall, local, and inter-board. Overall decoupling capacitors, also known as bypass capacitors, operate in the low-frequency (<1MHz) range, providing a current source for the entire circuit board, compensating for the ΔI noise current generated during circuit board operation, and ensuring the stability of the operating power supply voltage. Their size is 50 to 100 times the sum of all load capacitors on the PCB. They should be placed close to the external power and ground lines on the PCB, in areas with high trace density. This not only does not reduce low-frequency decoupling but also provides space for placing critical traces on the PCB.
Local decoupling capacitors serve two purposes.
First, from a functional perspective: the charging and discharging of the capacitor ensures a relatively stable power supply voltage to the integrated circuit, preventing temporary voltage drops from affecting the circuit's functionality.
Secondly, for EMC considerations: Providing a nearby high-frequency path for transient currents of the integrated circuit prevents current from passing through power supply lines with large loop areas, thus significantly reducing outward radiated noise. Simultaneously, since each integrated circuit has its own high-frequency path and there is no common impedance between them, impedance coupling is suppressed. Local decoupling capacitors are installed between the power supply and ground terminals of each integrated circuit, and as close as possible to the integrated circuit.
Inter-board decoupling capacitors refer to the capacitance between the power plane and the ground plane, and they are the main source of decoupling current at high frequencies. Inter-board capacitance can be increased by increasing the area between the power plane and the ground plane. In PCB design, some ground planes can be routed to the power plane; removing these ground planes and replacing them with power isolation areas can increase inter-board capacitance.
In DC power supply circuits, load changes can cause power supply noise. For example, in digital circuits, when the circuit transitions from one state to another, a large spike current is generated on the power line, forming a transient noise voltage. Configuring decoupling capacitors can suppress noise caused by load changes and is a standard practice in printed circuit board (PCB) reliability design. Good high-frequency decoupling capacitors can remove high-frequency components up to 1 GHz. Ceramic sheet capacitors or multilayer ceramic capacitors have better high-frequency characteristics. When designing PCBs, a decoupling capacitor should be added between the power supply and ground of each integrated circuit. Decoupling capacitors serve two purposes: firstly, they act as energy storage capacitors for the integrated circuit, providing and absorbing the charging and discharging energy during the opening and closing of the circuit; secondly, they bypass high-frequency noise from the device.
The principles for configuring decoupling capacitors are as follows:
1. Power distribution filter capacitor
Connecting a 10μF to 100μF electrolytic capacitor across the power input terminal is beneficial for noise suppression, provided the PCB layout allows for better placement. 1μF or 10μF capacitors, with parallel resonant frequencies above 20MHz, are also effective at removing high-frequency noise. Placing a 1μF or 10μF high-frequency suppression capacitor at the power input point is often advantageous, even in battery-powered systems.
2. Chip configuration with decoupling capacitors
Configure a 0.01μF ceramic capacitor for each integrated circuit chip. A typical decoupling capacitor in digital circuits is a 0.1μF capacitor with a 5nH distributed inductance. Its parallel resonant frequency is around 7MHz, meaning it provides good decoupling for noise below 10MHz but has almost no effect on noise above 40MHz. If space is limited on the printed circuit board, a 1μF to 10μF tantalum electrolytic capacitor can be used for every 4 to 10 chips. This type of device has particularly low high-frequency impedance, less than 1μF to 10μF in the 500kHz to 20MHz range, and very low leakage current (below 0.5μA). The selection of the decoupling capacitor value is not strict; it can be calculated using C=1/f, i.e., 0.1μF for 10MHz. For systems composed of microcontrollers, values between 0.1μF and 0.01μF are acceptable.
3. Add a storage capacitor if necessary.
For every 10 or so integrated circuits, a charging/discharging capacitor, or storage/discharge capacitor, should be added. The capacitor size can be 10μF. Electrolytic capacitors are commonly used large capacitors, but it is best not to use them when the filtering frequency is relatively high. Electrolytic capacitors are made of two thin films rolled up, and this rolled-up structure behaves as an inductor at high frequencies. It is better to use tantalum capacitors or polycarbonate capacitors.
Comparison of good and bad PCB layout
In addition to using decoupling capacitors, short, low-impedance connections should be made between the decoupling capacitors, power supply, and ground. A good decoupling layout is compared to a poor one. Always strive to keep decoupling connections as short as possible and avoid vias in the decoupling path, as vias increase inductance. Most product datasheets provide recommended values for decoupling capacitors. If not, 0.1uF can be used.
Issues with the placement of decoupling capacitors during PCB layout
For hardware engineers, when starting out at a company after graduation, senior engineers would often tell them during PCB design that PCB traces should not be at right angles, traces should be short, and capacitors should be placed close together, etc. However, initially, we might not understand why these rules are necessary. Their few words of experience are far from sufficient. Of course, if you don't pay attention to these details and make the same mistakes later, you might get scolded again: "How many times have I told you? Capacitors must be placed close together; placing them far away won't have the desired effect!" Experience often tells us that only a portion of those senior engineers truly understand the intricacies. Don't be discouraged if you don't understand at first; you'll quickly grasp it by reading more materials. After being scolded several times, we go back to relevant materials to find out why capacitors should be placed close together in PCB design. After reading the materials, we can understand some things, but the information online is scattered, and it's rare to find a comprehensive explanation. Two years into my career, I came across an article by a relevant person. The following article is a repost of a PhD's explanation of capacitor decoupling radius. I believe that after reading it, you can answer similar questions very well and avoid similar problems.
The teacher asked: Why are decoupling capacitors placed close to the source? The student answered: Because they have an effective radius; if they are placed too far away, they will fail.
Decoupling radius of capacitor
A crucial issue with capacitor decoupling is its decoupling radius. Most resources mention placing capacitors as close to the chip as possible, primarily focusing on reducing loop inductance. While reducing inductance is indeed a significant factor, another crucial reason often overlooked is the capacitor's decoupling radius. If the capacitor is placed too far from the chip, exceeding its decoupling radius, it will lose its decoupling function.
The best way to understand the decoupling radius is to examine the phase relationship between the noise source and the capacitor compensation current. When the chip's current demand changes, a voltage disturbance is generated in a small local area of the power plane. For the capacitor to compensate for this current (or voltage), it must first sense this voltage disturbance. Since signals take time to propagate through the medium, there is a time delay between the occurrence of the local voltage disturbance and the capacitor sensing it. Similarly, the capacitor's compensation current also requires a delay to reach the disturbance region. This inevitably leads to a phase inconsistency between the noise source and the capacitor compensation current.
A specific capacitor provides the best noise compensation for noise at its self-resonant frequency; we use this frequency to measure this phase relationship. Let the self-resonant frequency be f, and the corresponding wavelength be λ. The expression for the compensation current can be written as:
Where A is the current amplitude, R is the distance from the area to be compensated to the capacitor, and C is the signal propagation speed.
When the distance from the disturbance region to the capacitor reaches λ/4, the phase of the compensation current is π, exactly 180 degrees out of phase with the noise source, meaning they are completely out of phase. At this point, the compensation current no longer functions, the decoupling effect fails, and the compensated energy cannot be delivered in time. To effectively transfer the compensation energy, the phase difference between the noise source and the compensation current should be as small as possible, ideally in phase. The closer the distance, the smaller the phase difference, and the more compensation energy is transferred. If the distance is 0, 100% of the compensation energy is transferred to the disturbance region. This requires the noise source to be as close to the capacitor as possible, much smaller than λ/4. In practical applications, this distance is best controlled between λ/40 and λ/50, which is an empirical value.
For example, a 0.001uF ceramic capacitor, if its total parasitic inductance is 1.6nH after mounting on a circuit board, will have a resonant frequency of 125.8MHz and a resonant period of 7.95ps. Assuming the signal propagation speed on the circuit board is 166ps/inch, the wavelength is 47.9 inches. The capacitor decoupling radius is 47.9/50 = 0.958 inches, approximately 2.4 centimeters.
In this example, the capacitor can only compensate for power supply noise within a 2.4 cm radius around it; its decoupling radius is 2.4 cm. Different capacitors have different resonant frequencies and therefore different decoupling radii. For large capacitors, because their resonant frequencies are very low and the corresponding wavelengths are very long, their decoupling radii are large. This is why we don't pay much attention to the placement of large capacitors on the circuit board. For small capacitors, because their decoupling radius is very small, they should be placed as close as possible to the chip that needs decoupling. This is precisely what most documentation repeatedly emphasizes: small capacitors should be placed as close to the chip as possible.
Part 3: Decoupling capacitor capacitance calculation and layout routing
High-frequency switching noise generated by active devices during switching will propagate along the power lines. The main function of decoupling capacitors is to provide a local DC power supply to active devices to reduce the propagation of switching noise on the board and to guide the noise to ground.
Calculation of decoupling capacitor value
The purpose of decoupling is to ensure that the voltage limit is maintained within the specified allowable error range, regardless of the IC's current fluctuation specifications and requirements.
Use the expression: C⊿U=I⊿t
From this, the capacitance C of the decoupling capacitor required for an IC can be calculated.
Note: ΔU is the allowable drop in actual power bus voltage, in volts (V). I is the maximum required current in amperes (A); Δt is the duration this requirement is maintained.
A company's recommended method for calculating decoupling capacitor values: It recommends using a value much greater than 1/m multiplied by the equivalent open-circuit capacitance.
Here, 'm' represents the maximum percentage of power bus voltage variation allowed on the IC's power connector. Specific parameter values are usually provided in the IC's datasheet.
The equivalent open-circuit capacitance is defined as: C = P/(f·U^2)
In the formula:
P – Total wattage dissipated by the IC; U – Maximum DC supply voltage of the IC; f – Clock frequency of the IC.
Once the equivalent switched capacitor is determined, multiply it by a value much greater than 1/m to find the total decoupling capacitance required by the IC. Then divide the result by the total number of power pins connected to the same power bus, and finally obtain the capacitance value installed near each power pin connected to the power bus.
Reasons for choosing different combinations of decoupling capacitor values:
In the design of decoupling capacitors, several different capacitance values are usually used (usually differing by two to three orders of magnitude, such as 0.1uF and 10uF). The basic starting point is to disperse series resonances to obtain a lower impedance over a wider frequency range.
Explanation of capacitor resonant frequency:
Due to the pads and pins, each capacitor has an equivalent series inductance (ESL), thus forming a series resonant circuit. An LC series resonant circuit has a resonant frequency. The capacitor's characteristics change with the operating frequency. Below the resonant frequency, the capacitor is generally capacitive; above the resonant frequency, it is generally inductive. In this case, the decoupling capacitor loses its decoupling effect, as shown in the diagram. Therefore, to increase the series resonant frequency, the equivalent series inductance of the capacitor should be reduced as much as possible.
The capacitance value is generally chosen based on the capacitor's resonant frequency.
Capacitors with different packages have different resonant frequencies. The table below lists the resonant frequencies of capacitors with different capacitance values and packages:
It is important to note that for decoupling in digital circuits, a low ESR value is more important than the resonant frequency. This is because a low ESR value can provide a lower impedance path to ground, thus providing sufficient decoupling capability even when capacitors above the resonant frequency exhibit inductive behavior.
Methods to reduce ESL of decoupling capacitors:
The ESL of decoupling capacitors is caused by the internal current flowing through them. Using multiple decoupling capacitors in parallel can reduce the ESL effect. Furthermore, placing two decoupling capacitors together with opposite orientations allows the magnetic flux caused by their internal currents to cancel each other out, further reducing ESL. (This method is applicable to any number of decoupling capacitors; please note that this does not infringe on Dell's patents.)
Selection of the number of IC decoupling capacitors
When designing schematics, a common problem is designing decoupling capacitors for the chip's power supply pins. The capacitance value of the decoupling capacitor has been introduced above, but how do we determine the number? Theoretically, it is best to assign one decoupling capacitor to each power supply pin. However, in practice, we often see that the number of decoupling capacitors is less than the number of power supply pins. For example, in the PDK schematic of the iMX233 provided by Freescale, the SDRAM memory has 15 power supply pins, but the number of decoupling capacitors is 10.
Criteria for selecting the number of decoupling capacitors:
When space allows, it is best to assign one decoupling capacitor to each power supply pin. However, when space is limited, the number of capacitors can be reduced. The specific situation should be determined based on the specific distribution of power supply pins on the chip, because manufacturers often design ICs with several power supply pins together so that they can share decoupling capacitors and reduce the number of decoupling capacitors.
Capacitor installation method
Capacitor placement
When it comes to capacitor mounting, the first thing to consider is the mounting distance. The capacitor with the smallest capacitance value has the highest resonant frequency and the smallest decoupling radius, so it should be placed closest to the chip. Slightly larger capacitance values can be placed a little further away, with the largest capacitance value placed on the outermost layer. However, all capacitors decoupling from the chip should be as close to the chip as possible. Another reason is that if the decoupling capacitor is far from the IC power pins, the wiring impedance will reduce the effectiveness of the decoupling capacitor.
Another point to note is that when placing the pins, it's best to distribute them evenly around the perimeter of the chip, and this should be done for each capacitance level. Typically, the arrangement of power and ground pins is considered during chip design, and they are usually evenly distributed along the four sides of the chip. Therefore, voltage disturbances exist around the perimeter of the chip, and decoupling must be performed evenly across the entire area where the chip is located.
Capacitor Installation
When installing capacitors, a short lead is pulled from the pad and then connected to the power plane via a via; the same applies to the ground terminal. The basic principle for via placement is to minimize the loop area, thereby minimizing the total parasitic inductance. Figure 16 shows several via placement methods.
The first method involves running a long lead from the pad and connecting it to a via, which introduces a large amount of parasitic inductance. This should be avoided at all costs and is the worst mounting method.
The second method involves drilling holes close to the two ends of the pad, resulting in a much smaller circuit area and lower parasitic inductance than the first method, which is acceptable.
The third method involves drilling holes on the side of the pads, which further reduces the loop area and results in smaller parasitic inductance than the second method, making it a better approach.
The fourth method involves drilling holes on both sides of the pad. Compared to the third method, this is equivalent to each end of the capacitor being connected in parallel to the power plane and ground plane through vias. This method has lower parasitic inductance than the third method. If space allows, this method should be used as much as possible.
The last method involves drilling holes directly into the pads, which minimizes parasitic inductance. However, this method may cause soldering problems, and its suitability depends on the processing capabilities and methods used.
The third and fourth methods are recommended.
One point needs to be emphasized: some engineers, in an effort to save space, sometimes use multiple capacitors to share a common via. This should never be done. It's best to optimize the capacitor configuration design to reduce the number of capacitors.
Since wider traces result in lower inductance, the leads from the pads to the vias should be as wide as possible, ideally matching the pad width. This allows you to use 20mil wide leads even for 0402 packaged capacitors. Lead and via mounting is shown in Figure 17; note the various dimensions in the figure.
For large capacitors, such as tantalum capacitors used in board-level filtering, the mounting method shown in Figure 18 is recommended. Note: Do not drill holes between two pads for small capacitors, as this can easily cause a short circuit.
In summary, when selecting decoupling capacitors, factors to consider include the capacitor's ESR and ESL values, resonant frequency, and the number of decoupling capacitors to be determined based on the number of IC power pins and the surrounding layout space, as well as the specific placement position based on the decoupling radius.
