This article introduces some test methods that need to be considered for accurately measuring the radiation sensitivity of modern high-security, high-speed semiconductor memories, and timely testing to prevent damage to critical automotive electronic systems from cosmic rays. For obvious safety reasons, drive-by-wire technology places increasingly higher demands on the reliability of automotive electronic systems. At the same time, the increasing demand for lower costs is driving the adoption of the latest commercially available semiconductor components in automotive electronic subsystems. Semiconductor memories are, and will continue to be, fundamental components of automotive electronic subsystems. With the increasing demands and intelligence of automotive electronics in the coming years, semiconductor memories will inevitably increase in quantity, density, speed, and complexity. One aspect of semiconductor memory reliability is its sensitivity to radiation, which has been thoroughly studied. In early semiconductor memories, radioactive contamination in the packaging materials emitted alpha particles, which was eventually found to be the root cause of serious system failures in early computers. Fortunately, this problem was identified and largely solved long before the widespread use of microelectronics in automobiles. However, a 1994 IBM study found that the soft error rate (SER) of ground levels in memories caused by neutron flux induced by cosmic rays was significant, and that SER increased sharply in higher latitude regions such as Denver, USA. These data lead to the conclusion that semiconductor memory failures caused by cosmic rays are no longer a "space problem." The mechanisms underlying this failure must be considered in automotive electronic system design. Reliability engineers must accurately estimate the radiation sensitivity of commercially available memory devices used in their designs. Therefore, testing capabilities are needed to accurately measure the radiation sensitivity of modern memory devices. Test Tasks The diagram below shows a block diagram of a classic Synchronous Dynamic RAM (SDRAM) memory architecture, which includes: — A digital phase-locked loop (DLL) that synchronizes the internal memory operation at rated speed; — Multiple modules that interleave data for continuous, non-interval data transfers; — Delay circuitry controlling the operation of the internal pipeline; — Logic for generating burst serial or interleaved addresses from a single external starting address; — Word line and bit line encoders that select cells in the array; — Refresh circuitry; — Sensing amplifiers that detect the data status during read cycles. Any test procedure must consider the normal operation of each of these functions to accurately estimate the memory's radiation sensitivity. A 1991 study showed that the radiation-induced failure rate increases dramatically with device speed, largely due to the increased vulnerability of sensing amplifiers with increasing frequency. During active sensing, the differential voltage measured by the sensing amplifier is small and susceptible to radiation-induced single-event disturbances (SEUs). As the clock rate increases, the percentage of time the sensing amplifier is vulnerable to SEU attacks increases. Furthermore, due to the smaller memory cell size and reduced operating voltage, the sensing amplifier is more susceptible to radiation-induced errors. Therefore, to obtain accurate soft error rate (SER) measurements, the memory must be tested at its highest possible data rate and full specifications. Multi-Segment Operation Modern memories employ multi-segment designs, allowing interleaved data words for high-speed operation. The measured SER is significantly influenced by the number of activated sensing amplifiers; that is, by the number of memory segments operating simultaneously. Therefore, the interleaving schemes of different segments must be utilized and controlled to quantify their impact on SER measurements. The figure above shows an example of a memory mode sequence with all four memory segments activated, utilizing burst and reaction times to generate a continuous data stream to be output with “uninterrupted” operation. This operating mode is favored for certain computational operations due to its high-speed data transfer benefits. However, this mode is also more susceptible to radiation-induced errors because it activates all segments simultaneously, thus requiring more concurrently operating inductive amplifiers in the most sensitive state. Testing Above DLL "Hold-Lock" Speed To minimize the vulnerability of memories and systems to radiation attacks, engineers must analyze the memory's radiation sensitivity under various interleaving, bursting, and activation schemes and design the surrounding system operation accordingly. Modern memories utilize digital phase-locked loops (DLLs) to synchronize the operation of various internal circuits for high-speed data transfer. A DLL cannot maintain synchronization at a single frequency. The minimum "hold-lock" frequency of modern synchronous memories tends to increase. Minimum DLL frequency specifications exceeding 100MHz are common. Below the minimum frequency, the memory operates in different modes and does not reflect the actual operation of the memory in a real system. Some studies have measured the radiation sensitivity of memories at a data rate of 10MHz, far below the memory's DLL "hold-lock" frequency. Therefore, those measurements do not reflect the actual radiation sensitivity of the memory during operation. Accurate radiation sensitivity measurements require testing the memory when it is operating at its highest possible data rate (at least above the minimum DLL operating speed). Capturing the Full Array Bitmap The full array bitmap is crucial for studying the radiation sensitivity of memory. Bitmap errors are a primary tool for identifying array location fault relationships and using this information to optimize memory and system designs to reduce radiation sensitivity. For example, the bitmap can answer questions such as: If two memories have different layout sensitivities, do they have different radiation sensitivities? Are the most sensitive bits near the subarray edge or the center? Are there any internal devices sensitive to power distribution? The full array bitmap arrangement and storage must be near real-time to continuously monitor the effects of single events over time and allow testing the dependence of memory refreshes. Memory “scrambles” the location of data stored and “sensors” data written to the device array, allowing for denser data layout. Two adjacent external addresses frequently read and write data from different physical locations in the memory array. Adjacent bits in the array often have different “sensitivities.” One bit represents a “1” as the cell’s charged state; the next bit represents a “1” as the cell’s uncharged state. This is called bit folding. The radiation sensitivity of charged cells is higher than that of uncharged cells because the induced ionizing radiation tends to discharge the cells. Therefore, if an engineer writes all "1s" into the array, the array's radiation sensitivity will be underestimated; conversely, writing all "0s" will have the same effect. To accurately measure and compare the radiation sensitivity of memory, the test system must address the "scrambling" method for each device. Traditionally, topology scrambling information is not readily available from commercial memory manufacturers. Therefore, during radiation sensitivity testing, automotive electronics reliability engineers must ensure that topology scrambling is resolved to build confidence in accurately measuring radiation sensitivity. Because memory manufacturers face increasing radiation-induced failure rates in mission-critical and high-security applications (and even in general consumer applications), they are increasingly willing to collaborate in this area. Soft Error Functional Interruption (SEFI) Testing Requirements Memory exposed to radiation does more than just lose data. Sometimes, if sensitive areas of the memory's complex control circuitry (refresh, segment control, burst, mode control, etc.) are attacked by radiation, the memory will stop working. These events are known as Soft Error Functional Interruptions (SEFI). SEFI testing challenges include all the SEU testing requirements mentioned above, plus the following unique requirements: —To quickly identify intermittent SEFI events and offload them to test subroutines; —To quickly identify the root cause of SEFI; —To quickly identify the optimal SEFI recovery procedure; All of these requirements can be met if the test data rate and bitmap capture are fast enough. Challenges of Radiation Sensitivity Testing for Non-Volatile Memory Non-volatile memory (NVM) presents unique testing challenges for researchers analyzing radiation sensitivity. Modern NVM devices, with their high-speed, synchronous control circuitry and I/O operations, exhibit the same challenges as high-speed SDRAM described above. In addition, testing NVM devices relies on measuring the analog voltage threshold (Vth) for each cell in the memory array. The figure below shows the typical effect of Vth on flash memory devices. Measuring the voltage threshold for 16Gb (and above) capacity NVM devices is very time-consuming. The distribution of the voltage threshold changes with radiation exposure time. Measuring the actual Vth distribution for all cells requires very high-speed voltage measurements across multiple pins. Dedicated voltage threshold measurement circuitry and methods can reduce Vth measurement time from days to minutes. Real-time bitmap capture allows for the measurement of radiation-induced errors in high-capacity NVM devices, providing a temporal history. Summary Modern memories exhibit significant and increasing sensitivity to radiation-induced errors. Accurate measurement and comparison of the radiation sensitivity of modern semiconductor memories requires controlled test conditions commensurate with the device complexity.