Embedded Systems Fundamentals
1. Definition of Embedded System
(1) Definition: A dedicated computer system that is application-centric, based on computer technology, with customizable hardware and software, and adapted to the strict requirements of application systems in terms of functionality, reliability, cost, size and power consumption.
(2) The four stages of embedded system development: no operating system stage, simple operating system stage, real-time operating system stage, and Internet-oriented stage.
(3) Intellectual Property Core (IP Core): A functional module with intellectual property rights, specific functions, standardized interfaces, and reusable in multiple integrated circuit designs. It is a basic component for realizing a system-on-a-chip (SOC).
(4) IP core modules have different levels of design in terms of behavior, structure and physical. They can be divided into three categories according to the different descriptions of functional behavior: soft core, solid core and hard core.
2. Composition of Embedded Systems
It includes: hardware layer, middleware layer, system software layer, and application software layer.
(1) Hardware layer: embedded microprocessor, memory, general device interface and I/O interface.
Embedded core module = microprocessor + power supply circuit + clock circuit + memory
Cache: Located between main memory and the embedded microprocessor core, it stores the program code and data most frequently used by the microprocessor in the recent period. Its main goal is to reduce the memory access bottleneck caused by the main memory to the microprocessor core, thereby making processing faster.
(2) Intermediate layer (also known as Hardware Abstraction Layer HAL or Board Support Package BSP).
It separates the upper-layer software and the lower-layer hardware of the system, so that upper-layer software developers do not need to know the specific details of the lower-layer hardware, but can develop according to the interface provided by the BSP layer.
BSP has two characteristics: hardware dependency and operating system dependency.
Designing a complete BSP requires two parts:
A. Hardware initialization and BSP functions of embedded systems.
Chip-level initialization: A purely hardware initialization process that gradually sets the embedded microprocessor from its default power-on state to the operating state required by the system.
Board-level initialization: This is the initialization process that includes both hardware and software components. It is used in embedded IoT smart hardware systems to establish the hardware and software operating environment for subsequent system initialization and application development.
System-level initialization: A software-based initialization process that initializes the operating system.
B. Design hardware-related device drivers.
(3) System software layer: It consists of RTOS, file system, GUI, network system and general component modules.
RTOS is the foundation and development platform for embedded application software.
(4) Application software: consists of applications developed based on real-time systems.
3. Real-time system
(1) Definition: A system that can complete system functions and respond to external or internal, synchronous or asynchronous time within a specified or determined time.
(2) Difference: General systems generally pursue the average response time of the system and the ease of use for users; while real-time systems mainly consider the system behavior under the worst case.
(3) Characteristics: time constraints, predictability, reliability, and interactivity with the external environment.
(4) Hard real-time (strong real-time): refers to the application’s time requirements being fully met, otherwise it will cause major safety accidents, or even major loss of life and property and ecological damage, such as aerospace and military.
(5) Soft real-time (weak real-time): refers to applications that have time requirements, but occasional violations of these requirements by real-time tasks will not have a serious impact on system operation and environment, such as monitoring systems and real-time information acquisition systems.
(6) The constraints of a task include: time constraints, resource constraints, execution order constraints and performance constraints.
4. Real-time system scheduling
(1) Scheduling: Given a set of real-time tasks and system resources, determine the entire process of when and where each task will be executed.
(2) Preemptive scheduling: This is usually priority-driven scheduling, such as uCOS. Its advantages are good real-time performance, fast response, relatively simple scheduling algorithm, and it can guarantee the time constraints of high-priority tasks; its disadvantage is that there are more context switches.
(3) Non-preemptive scheduling: This is usually time-slice scheduling, which does not allow tasks to be interrupted during execution. Once a task occupies the processor, it must be completed or voluntarily given up, such as WinCE. The advantage is fewer context switches; the disadvantage is low effective utilization of processor resources and poor schedulability.
(4) Static table-driven strategy: Before running, the system generates a running time table based on the time constraints and relationships of each task, using a certain search strategy, indicating the start time and running time of each task.
(5) Priority-driven strategy: Determine the execution order of tasks according to their priority.
(6) Real-time task classification: periodic tasks, occasional tasks, and non-periodic tasks.
(7) General structural model of real-time system: Data acquisition task realizes the acquisition of sensor data, data processing task processes the acquired data and sends the processed data to the execution mechanism management task control mechanism for execution.
5. Embedded microprocessor architecture
(1) Von Neumann architecture: Program and data share a single memory space. Program instruction addresses and data storage addresses point to different physical locations within the same memory. A single address and data bus is used, and the program and data widths are the same. Examples: 8086, ARM7, MIPS…
(2) Harvard architecture: Program and data are two independent memories, each independently addressed and accessed. It is a memory architecture that separates program storage and data storage. For example: AVR, ARM9, ARM10…
(3) Comparison of the characteristics of CISC and RISC.
The time P required for a computer to execute a program can be calculated using the following formula:
P = I × CPI × T
I: The number of instructions that a high-level language program executes on the machine after compilation.
CPI: The average number of cycles required to execute each instruction.
T: Time per machine cycle.
(4) Pipeline concept: In the CPU, the serial execution process of one instruction is transformed into several sub-processes of instructions that are executed in an overlapping manner.
(5) Production line specifications:
Throughput: The number of results output by the pipeline processor per unit time. If the subprocesses in the pipeline take different amounts of time, the throughput should be the reciprocal of the longest subprocess.
Setup time: The time it takes for the pipeline to reach its maximum throughput after it starts operating. If the setup time for each of the m subprocesses is the same, t, then the setup time T = mt.
(6) Byte order of information storage
A. Memory unit: byte (8 bits)
B. Word length determines the addressing capability of a microprocessor, that is, the size of its virtual address space.
C. The virtual address space of a 32-bit microprocessor is 2^32 bits, or 4GB.
D. Little-endian byte order: The low byte is located at the low memory address, and the high byte is located at the high memory address.
E. Big-endian byte order: The high byte is located at the low memory address, and the low byte is located at the high memory address.
F. The storage order of network devices depends on the data link layer at the bottom of the OSI model.
6. Fundamentals of Logic Circuits
(1) Based on whether the circuit has storage function, logic circuits are divided into combinational logic circuits and sequential logic circuits.
(2) Combinational logic circuits: The output of a circuit at any given time depends only on the input signal at that time, and is independent of the state of the circuit before the input signal is applied. Commonly used logic circuits include decoders and multiplexers.
(3) Sequential logic circuits: The output of a circuit at any given time depends not only on the input at that time, but also on the state of the circuit at that time. Therefore, sequential circuits must contain memory elements. Flip-flops are the foundation of sequential logic circuits. Commonly used sequential logic circuits include registers and counters.
(4) The concepts of truth table, Boolean algebra, Morgan's law, and gate circuit.
(5) NOR (or NOT) and NAND (AND NOT) gate circuits are called universal gate circuits, which can implement any logic function.
(6) Decoder: Multi-input multi-output combinational logic network.
For each input of an n-bit binary code, at most one of the m output terminals will be valid.
When m = 2n, it is full decoding; when m < 2n, it is partial decoding.
(7) Since the high-level output current of integrated circuits is small, while the low-level output current is relatively large, the low-level driving method is often used when using integrated gate circuits to directly drive LEDs. LCD seven-segment displays utilize the different optical characteristics of liquid crystals when an external electric field is applied and when no external electric field is applied to display characters.
(8) The clock signal is the basis of sequential logic, and it is used to determine the appropriate update of the state in the logic unit. Synchronization is the main constraint in the clock control system.
(9) When selecting a trigger, the triggering method is a crucial factor to consider. There are two triggering methods:
Level-triggered mode: It has the advantage of simple structure and is often used to form temporary registers.
Edge-triggered mode: It has a strong ability to resist data line interference and is often used to form registers, counters, etc.
7. Bus circuit and signal drive
(1) A bus is a collection of various signal lines and serves as a common path for transmitting data, address, and control information between components in an embedded system. At any given time, each path can transmit one bit of binary signal. According to the type of information transmitted, buses can be divided into: data bus (DB), address bus (AB), and control bus (CB).
(2) Main parameters of the bus:
Bus bandwidth: The amount of data that can be transmitted on a bus within a certain time, usually expressed in MByte/s.
Bus width: The number of bits of data that a bus can transmit simultaneously, commonly referred to as 32-bit, 64-bit, etc., is also called bus bit width. The wider the bus bit width, the higher the data transfer rate per second, that is, the wider the bus bandwidth.
Bus frequency: The operating clock frequency is measured in MHz. The higher the operating frequency, the faster the bus operates, which means the wider the bus bandwidth.
Bus bandwidth = bus width × bus frequency / 8, the unit is MBps.
Commonly used buses include: ISA bus, PCI bus, IIC bus, SPI bus, PC104 bus, and CAN bus.
(3) Only devices with tri-state outputs can be connected to the data bus. Commonly used tri-state gates are output buffers.
(4) When the load connected to the bus exceeds the bus's load capacity, a buffer or driver must be added between the bus and the load. The most commonly used is a tri-state buffer, which serves to drive and isolate.
(5) Bus multiplexing technology can be used to share the data bus and the address bus. However, it will bring two problems:
A. External circuitry is needed to multiplex and decouple the bus signals, such as an address latch.
B. The bus speed is relatively low compared to non-multiplexed bus systems.
(6) Two types of bus communication protocols: synchronous mode and asynchronous mode.
(7) The solution to the bus arbitration problem is based on the concept of priority.
