Abstract: This paper introduces the hardware and software design of a novel portable electrocardiogram (ECG) monitor. A 32-bit low-power microprocessor based on an ARM core serves as the system control core. The system uses the open-source embedded uClinux operating system, enabling real-time display and remote monitoring of ECG signals. It boasts advantages such as portability, energy efficiency, powerful functionality, and stability. Keywords: ECG, ARM, uClinux, LCD display, TCP/IP protocol I. Introduction Cardiovascular diseases are currently among the most harmful diseases to humankind, and electrocardiograms (ECGs) are the primary means and basis for examining, diagnosing, and preventing such diseases. Traditional PC-based ECG monitors are expensive, bulky, inconvenient to move, and mainly concentrated in large hospitals, making real-time monitoring of patients' conditions impossible and causing significant inconvenience to both doctors and patients. In recent years, with the rapid development of embedded and network communication technologies, we have developed a new type of embedded electrocardiogram (ECG) monitor based on the ARM7 processor. It uses a 32-bit high-speed RISC processor, the S3C44B0X, with an ARM7TDMI core from Samsung, offering advantages such as low cost, small size, high reliability, and simple operation. It is suitable for individuals, small and medium-sized hospitals, and community healthcare units, providing excellent assistance and support for emerging medical approaches such as home healthcare (HHC) and telemedicine. II. System Working Principle The ECG signal is collected from the left and right arms via dedicated electrodes and sent to the signal conditioning circuit. It is first pre-amplified by a preamplifier, then filtered by a high-pass filter to remove DC signals and low-frequency baseline interference. After further amplification by a subsequent amplifier, it is further filtered to remove 50Hz power frequency interference. Finally, after passing through a low-pass filter, the ECG signal meets the requirements and is sent to the ADC for high-precision A/D conversion. To better suppress interference signals and prevent lead loosening and detachment, we also introduced a right leg drive circuit and a lead detachment detection circuit into the circuit. The system control core adopts Samsung's S3C44BOX, and an LCD screen establishes a user-friendly human-machine interface. The acquired signals can be displayed and played back in real time through the LCD. Data is reliably transmitted sequentially to the ECG monitoring center via the Internet based on TCP/IP (Transmission Control Protocol, Internet Protocol), providing a reference for timely and accurate diagnosis by medical staff. The embedded real-time operating system adopts the popular uClinx, which manages and coordinates the work of various modules, ensuring the reliable operation of the system. III. System Hardware Module Design 3.1 Signal Conditioning Circuit The signal conditioning circuit mainly includes: amplifiers, bandpass filters, notch filters, etc. Figure 2 shows the ECG preamplifier circuit. Human ECG signals are low-frequency, weak signals against a strong noise background, typically only 0.05-5mV, with a frequency range of 0.05-100Hz. The amplitude of a normal ECG signal output is approximately 1mV, while the input level of the A/D converter needs to reach around 1V, meaning the ECG amplification factor is approximately 1000 times. Since electromyography (EMG) interference can cause a shift in the preamplifier's static operating point, or even cutoff saturation, the preamplifier's gain cannot be too high. We selected the AD620 instrumentation amplifier as the system preamplifier, which features low noise, low drift, high common-mode rejection ratio, and high input impedance. Its gain is adjusted via resistors Rg at pins 1 and 8, ranging from 1 to 100 times, calculated as: G = 49.4 / Rg + 1. I designed the primary amplification factor to be around seven stages, using precision wire-wound resistors with an accuracy of 0.01% and a resistance of 8.25 ohms. The subsequent stage uses a TL064 to amplify the signal to the input level required by the A/D converter. To suppress DC drift and low-frequency noise outside the amplifier passband, an RC high-pass filter was designed. Since the frequency of ECG signals is below 100Hz, low-pass and band-stop filters were also designed to eliminate high-frequency signals and 50Hz power frequency interference. To prevent lead loosening and detachment, a lead detection circuit was designed. When an electrode falls off, the comparator's output level changes from the normal high level to a low level, generating an alarm signal to remind the patient to check the leads. In the right leg drive circuit, after detecting the human body common-mode voltage, it is inverted , amplified, and fed back to the person's right leg, instead of being directly connected to the amplifier's ground. This way, the human body's displacement current does not flow to ground but to the op-amp's output, reducing the common-mode voltage pickup of the AD620. 3.2 Embedded Processor and Peripheral Circuits The S3C44B0X is a cost-effective and high-performance microprocessor solution provided by Samsung for handheld devices and general applications. The CPU core uses a 16/32-bit ARMTDMI RISC processor (66Hz) designed by ARM, with a core operating voltage of 2.5V, 8KB of high-speed cache, an external memory controller with 8 banks totaling 256MB, an 8-channel 10-bit ADC, and a color/black-and-white LCD controller. It features normal, slow, idle, and stop power control modes, and its streamlined, fully static design is suitable for low-cost and power-sensitive designs. 3.2.1 A/D Conversion The consideration of sampling accuracy for ECG signals is mainly due to the requirements for ST segment abnormality analysis and processing. The ST segment level change of 0.05mV is generally accepted; therefore, the sampling accuracy must be at least 0.025mV. According to the American Heart Association (AHA) standard and Nyquist sampling law, when the signal sampling frequency is equal to or greater than twice the highest frequency of the signal, the original signal can be reconstructed from the sampled signal without distortion. The ECG frequency range is 0.05–100 Hz. We selected a sampling frequency of 200 Hz, resulting in a sampling period of 5 ms. The S3C44B0X has an internal 10-bit ADC with 8 successive approximation analog signal inputs. The full-scale input voltage is 2.5V, and the minimum resolvable input voltage change is 2.5V/2^10 = 2.5mV. The ECG acquisition amplification factor is approximately 1000 times, and the minimum input resolution is approximately 2.5mV/1000 = 0.0025mV, thus fully meeting the system requirements. 3.2.2 System Program Memory Flash ROM and SDRM Extension The S3C44B0X itself does not have a ROM, therefore an external ROM device must be used to store the program code and data that need to be preserved after power failure. We adopted a 1MB×16 CMOS multi-purpose Flash ROM from SST, which has advantages such as high reliability, low power consumption, and fast read speed. After system reset, execution begins at address 0X00000000. The system startup code should be stored starting at this address, so the Flash memory is mapped to Bank 0 of the processor. A Linksmart 8MB SDRM L43L16064 is used as the system program's running space, data area, and stack area for fast system read/write. Its storage configuration is 4 Banks × 1MB × 16, employing a multi-bank and pipelined structure, and features automatic refresh, low power consumption, and power-down mode. Its storage space is mapped to Bank 6 of the S3C44B0X, with an address range of 0XC000000H-0XCFFFFFFH. 3.2.3 LCD Display and Keyboard Module To enable users to have a direct impression of the acquired ECG signals and perform basic observations, we used an EPSON EG1147 FSTN monochrome LCD display module to display time, waveforms, ECG parameters, and system menus, while simultaneously using buttons for instrument control and settings. Its display has a 240×320 pixel resolution, uses an EL backlight, and has its own driver. By programming the S3C44B0X's built-in LCD controller, image data located in the display buffer in memory is transferred to the external LCD driver. The PC port and PD port serve as the LCD driver interface; the PC port is set to operate in the third functional state, and the PD port in the second functional state. 3.2.4 Ethernet Module Design: The S3C44B0X does not integrate a Network Interface Controller (NIC), so we added a REALTECK RTL8019AS controller to the system. It is compatible with the NE2000, has good software portability, and a simple interface circuit. RTL8019AS Working Principle: The driver program writes the data to be sent into the chip according to the specified format and initiates the send command. Conversely, when the chip receives signals from the physical channel, it directly converts them into data of the corresponding format according to the Ethernet protocol and issues an interrupt, requesting the CPU to read the data. IV. System Software Design The software design mainly includes porting the uClinux embedded operating system to the S3C44B0X, ECG data acquisition and storage, implementation of an embedded GUI based on the S3C44B0X, and network device driver development. 4.1 Porting the uClinux Embedded Operating System to the S3C44B0X uClinux is a free and open-source operating system specifically designed for processors without an MMU (Memory Management Unit). It supports multitasking and adopts a modular design. System porting can be divided into two main parts: bootloader and kernel porting. The bootloader, in essence, is not part of the system kernel; it starts running after the CPU powers on, creating the initialization environment and booting the kernel. This part of the code is written in assembly language and mainly completes hardware initialization, initializing the system's memory map, and changing the PC value, causing the CPU to start executing the operating system kernel from the SDRM. When porting the kernel, first download the source code package under Red Hat Linux and set up a cross-compilation environment. Then, navigate to the uClinux-dist folder to configure the kernel. The system configuration mainly consists of three parts: Makefile, configuration file (config.in), and configuration tools (located in the /script directory). Running the `make menuconfig` command will display a top-level menu, allowing you to select the hardware system, kernel version, and C library. Here, we select Samsung's S3C44B0X as vendors, Linux-2.4-x as the kernel version, and uClibc as the C library. Next, modify the source code, corresponding to the subdirectories for each hardware component. For example, modify or add drivers in uClinux-dist/linux-2.4-x/drivers/. Save the settings and exit, then run `make dep` and `make lib_only` to generate the C library. Run `make user_only` to generate the application. Then run `make romfs` and `make image` to generate the ROM filesystem and copy the kernel file to uClinux-dist/images. Finally, run `make` to generate the kernel file that can run on the embedded system. At this point, three files will appear in uClinux-dist/images: one containing "rom" is the compressed kernel, one containing "ram" is the directly executable kernel, and romfs.img is the uClinux filesystem. The "ram" and "rom" files can be downloaded from the PC's serial port to the embedded system's memory for direct execution via a terminal emulator. The terminal emulator will then display uClinux's boot information. 4.2 Implementation of Embedded GUI Based on S3C44B0X The screen driver program mainly uses a PSD (Pointer to Screen Device) structure pointer. The structure pointed to by the pointer records all relevant attributes. Based on the display attributes, it determines which sub-function to provide the relevant display function. The graphics engine calls the PSD to complete rectangle, circle, and other drawing functions. These functions call the underlying screen driver's basic drawing functions to complete the graphics display. 4.3 Implementation of RTL8019AS Driver in uClinux In uClinux, the network interface is treated as an entity that sends and receives data packets, represented by a net_device data structure. Various operations on the network interface are defined in this data structure. Our program is based on the uClinux network driver files, mainly modifying two files under /drivers/net: ne.c and 8390.c, including most of the work such as chip initialization, packet reception, and network registration. During kernel initialization, the function `ne_probe()` is automatically called to read the RTL8019AS identifier register, check the existence of the device to determine whether to start the driver, configure and initialize the hardware, then initialize the variables in the `net_device` structure, and then call `Rtl8019as_init()` to make relevant register settings for the RTL8019AS. Finally, the RTL8019AS is started and stopped based on the value of `starp`. V. Conclusion Addressing the extremely weak and easily interfered-with characteristics of ECG signals, this paper innovates by using the AD620 instrumentation amplifier with low drift and common-mode rejection ratio for primary signal amplification, and designing a right leg drive circuit to enhance the signal's anti-interference capability. The introduction of an LCD provides an intuitive impression and allows for common-sense judgment. The collected data can be transmitted in real-time via Ethernet to a remote data center for expert analysis and diagnosis. The introduction of embedded uClinux ensures stable and reliable system operation. The miniaturized design makes it more convenient for patients to carry. With the incidence of cardiovascular diseases rising year by year, this portable ECG monitor has high application value and a promising market prospect.