The watchdog timer (WDT) is a component of a microcontroller and plays a crucial role in the debugging and execution of the microcontroller program. Its main function is to reset the microcontroller by resetting the device (if the software has not cleared the device) in the event of a software fault. It can also be used to wake the device from sleep or idle mode.
There is a very vivid metaphor
That's basically what a watchdog is all about.
For example, imagine you're running naked around a small hill. — The program executes according to the pre-defined procedure.
Every time you pass a certain spot at the foot of the mountain, you give a big wolfhound a bone. — Feeding the dog.
As you were running, you went astray and ended up at a mountain peak you shouldn't have reached. — The program went awry.
Or, you fell asleep while running naked. —The program crashed.
At this moment, the large wolfhound, having gone hungry for so long, broke free of its chain and chased after you. —Watchdog timer overflow.
Startled by it, your legs give way, and you tumble down the mountain. You get up and realize, damn it, you're back at the starting point. So you have to start running naked all over again. —Program reset.
Watchdogs are used to enhance reliability.
The watchdog timer does not stop when the main chip clock stops; it is an independent timing unit. If you use and set the watchdog register in your program, it will start after the system is powered on. If the watchdog register is not reset within a specified period (which is commonly referred to as "feeding the dog"), the system will restart.
This design provides the system with extremely high reliability, and even if the system freezes, it can automatically recover in a timely manner.
The principle of watchdog
A hardware watchdog timer uses a timer to monitor the main program's execution. This means that during the main program's operation, the timer needs to be reset before the timeout expires. If an infinite loop occurs, or the program counter (PC) pointer fails to return, the microcontroller will be reset after the timeout.
The principle of software watchdog technology is similar, except it's implemented in software. Let's take the 51 series as an example. We know that the 51 microcontroller has two timers, which we can use to monitor the main program's execution. We can set a specific timeout for T0. When a timer interrupt occurs, a variable is assigned a value. This variable already has an initial value at the beginning of the main program's execution. Here, the timeout value we set must be less than the main program's execution time. At the end of the main program, we check the variable's value. If the value changes as expected, the T0 interrupt is normal; otherwise, the program is reset. For T1, we use it to monitor the main program's execution. We set a specific timeout for T1 and reset it within the main program. If it's not reset within the specified time, the T1 timer interrupt will reset the microcontroller.
Here, the timer interval of T1 should be set longer than the main program's execution time to allow the main program some leeway. The T0 timer interrupt subroutine then monitors whether T1's interrupt is functioning correctly. This forms a loop: T0 monitors T1, T1 monitors the main program, and the main program monitors T0, thus ensuring stable system operation.
The 51 series has a dedicated watchdog timer that divides and counts the system frequency. When the timer overflows, it will trigger a reset. The watchdog timer can be configured with an overflow rate and can also be used independently as a timer.
Watchdog Usage Precautions
Most 51 series microcontrollers have a watchdog timer. If the watchdog timer is not cleared periodically, it will trigger a reset. This prevents the program from crashing. Designers must know the watchdog timer's overflow period to determine when to clear it appropriately. Clearing the watchdog timer too frequently will waste resources. During normal program operation, the software can reset the timer at regular intervals (less than the timer's overflow period) to prevent accidental resets caused by overflow interrupts.
The design concept of system software "watchdog"
1. Setting the watchdog timer T0. In the initialization block, set the operating mode of T0 and enable interrupt and counting functions. The system Fosc = 12MHz, T0 is a 16-bit counter with a maximum count value of (2^10) - 1 = 65535, the T0 input counting frequency is Fosc/12, and the overflow period is (65535 + 1)/1 = 65536 (μs).
2. Calculate the execution time of one loop of the main control program. Considering the various functional modules of the system and their loop counts, the execution time of the main control program of this system is approximately 16.6ms. The system sets the watchdog timer T0 to 30ms (the initial value of T0 is 65536-30000=35536). The initial value of T0 will be refreshed in each loop of the main control program. If the program enters an "infinite loop" and the initial value of T0 is not refreshed within 30ms, the watchdog timer T0 will overflow and request an interrupt.
3. Design the interrupt service routine corresponding to the T0 overflow. This subroutine requires only one instruction, which is to write the "unconditional jump" command to the interrupt vector address (000BH) corresponding to T0, drag the computer back to the first line of the entire program, reinitialize the microcontroller, and obtain the correct execution order.
Most modern MCUs have a watchdog timer.
There are generally three main operations for a watchdog timer: starting, triggering, and stopping. Starting involves setting initial parameters and calling an interrupt to make the watchdog timer begin working; triggering involves restoring the watchdog timer to its initial value before the counter reaches zero; stopping involves calling an interrupt to stop the watchdog timer from being used. Choosing the appropriate point in the program to trigger the watchdog timer requires careful consideration, and this can be difficult to determine, especially for large programs. However, using it does offer many advantages, and its inconvenience shouldn't be dismissed simply because it's difficult to use.
Almost all embedded operating systems have a watchdog timer, whose main function is to prevent the system from crashing or getting stuck in an infinite loop. In other words, the watchdog timer is executed at regular intervals to reset the system.
For example, you can trigger the watchdog timer during OS task scheduling. This way, if a task stops for an extended period, the scheduling system will reset. This feature is very simple to implement and doesn't require much effort from the application.
Watchdog timers typically have a timeout period set during startup. The timeout period decreases at a certain frequency and resets when it reaches zero. Therefore, a timer needs to be periodically updated to its maximum value to prevent it from decreasing to zero. The timeout period is usually fixed during initialization.
