1. Introduction: With the continuous development of electrification, the application of embedded systems is also advancing rapidly. The basic meaning of a microcontroller in an embedded system is: a relatively complete digital processor integrating a central processing unit, memory, timer/counter, and various input/output interfaces on a single chip. Its main characteristics are: directly facing the controlled object, embedded into specific applications, able to operate reliably in the field, small size, flexible application, prominent control functions, especially the capture of external information and rich I/O functions. Its emergence is a product of the development of large-scale integrated circuit technology. It is widely used in industrial control, communication, intelligent instrumentation, and other fields. A processor that is oriented towards measurement and control objects and embedded into practical application systems to realize embedded applications is called an embedded system. DSP is a digital signal processor designed for real-time digital signal processing. Due to its outstanding advantages of high computing speed, small size, and low power consumption, it is very suitable for embedded real-time systems. Since the world's first general-purpose DSP chip, the TMS320C10, was produced by TI in the United States in 1982, DSP processors have shown strong vitality. In just over two decades, many companies worldwide have developed various specifications of DSP processors, which have been widely used in many embedded real-time fields such as communications, automatic control, radar, meteorology, navigation, and robotics. Digital Signal Processors (DSPs) are now increasingly used in various applications. The low power consumption of the TMS320C28X series DSPs makes them particularly suitable for portable devices. Flash memory, with its low power consumption, small size, and programmable characteristics, is also suitable for portable devices. Currently, Flash memory is evolving from a simple replacement for EPROM to an indispensable component in many circuit systems. Flash memory has become a basic configuration of DSP systems, mainly used to store data that needs to be preserved after power failure. This article uses the TMS320C2812 and AT49BV162 as examples to introduce the methods and applications of expanding external Flash memory in embedded systems using DSPs. 2. Application in Embedded Systems The DSP/BIOS kernel implements runtime services by calling the DSP/BIOS API through the target application. Typically, a single DSP/BIOS module can manage one or more related kernel objects and control the entire behavior based on the setting of global parameters. Generally speaking, DSP/BIOS can be categorized into six major functional classes: core execution threads, hardware abstraction, device-independent I/O, internal thread communication and synchronization, real-time analysis, and multi-system services. This design scheme is applied to the operation of a railway system. The DSP, as the core of the entire system design, collects various information from the railway, such as track type, speed, and frequency, through an A/D converter. It then uses the DSP's fast data processing capabilities to perform calculations and judgments on the converted digital information. Combined with its control functions and powerful expansion capabilities for external devices, it outputs control signals to the front-end display, printer, and control console. This is an application example of a DSP real-time multitasking kernel in an embedded system. By improving the train operation system from manual track type switching to automatic switching, a foundation is laid for increasing train speed. Due to the diverse construction standards of railway tracks in my country, the amount of information during track switching is large, and this change is uneven due to the varying lengths of the railway tracks. Therefore, it is necessary for the DSP to not only perform standard determination calculations and control signal outputs every time the standard information changes, but also to record the data. This recording of standard information should not change with external voltage variations, hence the use of Flash memory for data storage. The data recorded in Flash memory can be accessed externally and also acts as a black box. The following section introduces one aspect of real-time multitasking: how to expand Flash memory externally to the DSP in an embedded system. 3. TMS320C2812 Internal Memory Structure The core of TI's TMS320C28X series DSPs is the same CPU, but their memory and peripheral device configurations differ. The C28X memory consists of three independent spaces: program, data, and I/O spaces. Different C28X devices use a modified Harvard architecture for memory mapping, but the size of the on-chip memory and the number of external address pins differ. External pins and registers also affect the memory configuration. The TMS320C2812's asynchronous peripherals include 19 address lines, 16 data lines, and three chip select lines. Three chip select lines are mapped to five external spaces: regions 0, 1, 2, 6, and 7. Regions 0 and 1 share a single chip select line, and regions 6 and 7 share a single chip select line. Each region can be programmed with its own wait state, gate signal settings, and set times. Each region can also be programmed to support peripheral expansion. Programmable wait states, chip strobes, and programmable gate times make external expansion registers and peripheral devices highly versatile. See Figure 1. [IMG=Peripheral Device Module Chart]/uploadpic/THESIS/2007/12/2007121214113556336V.jpg[/IMG] Figure 1 Peripheral Device Module Chart. The C2812 device can expand external memory and Flash on the external bus. Its paging structure for expanding external memory allows addressing more than 64k of space. Registers in the CPU and corresponding far-address instructions allow addressing an additional 7 address lines in the program space. Access to the data space does not affect A16 to A22. The physical addresses of each region are as follows: 0x00 2000 Zone0, 0x00 4000 Zone1, 0x08 0000 Zone2, 0x10 0000 Zone6, 0x3F C000 Zone7. 4. Connection Method between TMS320C28X and AT49BV162 Flash Memory For ease of circuit design and debugging, the AT49BV162 series Flash chip from Atmel was selected. Because the AT49BV162, like the VC549, is powered by a 3V power supply, this eliminates the need for buffering and level conversion of data and address lines; therefore, the AT49BV162 Flash device was chosen. The Flash is in read mode when powered on. External commands can put the Flash into programming or erasing mode. The Flash can protect each sector. The AT49BV162 has a 16Mb memory capacity and offers two byte transfer modes: 16-bit (1,048,576 words) and 8-bit (2,097,152 words). The memory can be divided into 71 sectors for operation. CE and OE control signals prevent interference from other lines. This single-supply operation for reading and programming the chip is ideal for system programming. To increase flexibility, the Flash memory includes erase wait and program wait functions. This feature suspends erase and program operations until the read/program process is complete, resuming execution when the READY/BUSY pin or the pending bit is set. VPP provides data protection; programming and erasing functions are disabled when the VPP input voltage is less than 0.4V, and these normal functions are enabled only when the VPP voltage is greater than 0.9V. The BYTE pin controls the Flash data structure. If BYTE is set to logic 1, the Flash data structure is transmitted byte-by-byte, with I/O0-I/O15 transmission controlled by CE and OE; otherwise, it is transmitted bit-by-bit. When CE and OE are low and WE is high, the AT49BV162 can be accessed like an EPROM. The data stored in the memory cell address is determined by the address lines connected to the output. When CE or OE is high, the output is in a high-impedance state. Dual control can more effectively prevent bus contention. As shown in Figure 2. [IMG=Flash Module Diagram]/uploadpic/THESIS/2007/12/2007121214214517816K.jpg[/IMG] Figure 2 Flash Module Diagram The Flash address lines are connected to the DSP address lines, and the Flash data lines are connected to the DSP data lines. The DSP's ZONE2 is connected to the Flash's CE to control chip select. This allows internal data to be stored in Flash memory. When external data needs to be read, a read operation is performed on the Flash memory, and the data is then sent out via the serial port. This not only reduces the load on the internal storage space but also ensures maximum data storage. 5. AT49BV162 Flash Memory Read/Write The AT49BV162 is a Flash memory manufactured by Atmel that supports in-system programming. Programming the AT49 series is a simple, repeatable process. The total storage capacity of each chip is divided into several memory arrays (sectors), and one sector is programmed at a time. The programming command is a 3-bus-cycle instruction. It begins with two unlock cycles, followed by a programming setup command, and finally the address and data to be programmed. After writing the address and data, the built-in programming algorithm automatically starts to program the Flash memory. After the programming algorithm completes, it enters the data reading state. Here, the DSP controls the Flash memory to complete the read and write operations. Complete the following in C language: 5.1 Configure the XINTF register: XintfRegs.XTIMING2.bit.USEREADY = 0; //XREADY unused XintfRegs.XTIMING2.bit.XWRLEAD = 1; //LEAD 1 sysclock XintfRegs.XTIMING2.bit.XWRACTIVE= 1; //ACTIVE 2 sysclock XintfRegs.XTIMING2.bit.XWRTRAIL = 1; //HOLD 1 sysclock XintfRegs.XTIMING2.bit.X2TIMING = 0; // 1:1 lead/active/trial timing for Zone 2 XintfRegs.XTIMING2.bit.XSIZE = 3; //XINTF bus width - must be written as 11b The XINTF signal timing can coordinate the signal clock requirements of external special peripherals. The timing parameters can be set according to the area where different peripherals are connected. 5.2 Read and write Flash programming unsigned int * ext_Flash = (unsigned int *) 0x100000; // address of Flash void FlashWrite (unsigned int * Flashwtbuf, unsigned int start, unsigned int end) { unsigned int Flashwp; for (Flashwp = start; Flashwp <= end; Flashwp++) { * (ext_Flash + Flashwp) = * (Flashwtbuf++); } } void FlashRead (unsigned int *Flashrdbuf, unsigned int start, unsigned int end) { unsigned int Flashrp; for (Flashrp = start; Flashrp <= end; Flashrp++) { ＊(Flashrdbuf++) = ＊(ext_Flash + Flashrp); References [1] Gong Maozhong, In-system programming of flash memory and its application in DSP system [J], Electronic Technology Application, 2002, 3, 69-71 [2] Markus Levy, Flash memory design tool expo [J], Electronic Design Application, 1996, 2, 42-45 [3] Antony Watts, Correct selection of non-volatile memory [J], Electronic Design Application, 1996, 3, 38-45 [4] TMS320C2812 User Guide, Texas Instruments, 2004 [5] AT49BV162 User Guide, Atmel, 2004