Research on Anti-interference Methods for Digital Time Relays
2026-04-06 07:37:12··#1
Abstract: This paper analyzes the causes of maloperation of digital time relays under electromagnetic interference conditions and preliminarily discusses anti-interference measures for digital time relays under such interference conditions, providing a reference for further improving the anti-interference performance and reliability of digital time relays. Keywords: Digital time relay, anti-interference, filtering Introduction With the continuous development of digital technology and related disciplines, relay protection technology has also made great progress, such as the application of static relays in power systems. Among them, digital time relays, as basic components, have been widely used in various relay protection and automatic control circuits to achieve the required delay in the operation of controlled equipment or circuits and to realize selective coordination between main protection and backup protection. Digital time relays are used in relay protection, primarily to replace electromagnetic and transistor time relays. They can shorten the overcurrent protection step difference, reduce maintenance, and improve the accuracy of protection operation. They protect the safe and stable operation of the main system and main equipment. Due to their high accuracy, good stability, convenient and intuitive setting, no need for verification when changing the setting value, and wide setting range, they are very popular with users. Therefore, digital time relays are widely used in power systems. However, in recent years, digital time relays have repeatedly malfunctioned in power systems, causing significant losses to users. The causes of these malfunctions include poor system environment, usage and maintenance issues, product quality problems, component damage, and poor anti-interference performance. However, the most difficult problem to address is the poor anti-interference performance of digital time relays. This article presents our views on the anti-interference performance of digital time relays for reference. 1. Methods to improve anti-interference capability 1.1 Main sources of interference Relays in power system operation are mainly subject to electromagnetic interference, which comes from the following sources: (1) When the DC low-voltage circuit disconnects the inductive load (such as contactor, intermediate relay, etc.) or the contacts of electromagnetic current and voltage relays bounce, fast transient pulse groups of electromagnetic waves are often generated; (2) Inductive interference generated when high-voltage electrical equipment near the high-voltage substation is operated; (3) Frequency modulation electromagnetic waves and high-frequency electromagnetic radiation generated when mobile phones, portable walkie-talkies and adjacent or nearby equipment generate frequency modulation electromagnetic waves and arc discharge; (4) Electromagnetic energy propagated through space by pulse circuits, clock circuits, switching power supplies, transceivers, etc. in the equipment; (5) Discharge generated when charged operators touch the conductive parts of the equipment. 1.2 Propagation mode of electromagnetic interference There are two main forms of electromagnetic interference propagation: conduction and radiation. Conduction acts on the relay in the form of current or voltage through the conductor. Radiation acts on the relay in the form of electromagnetic field through space. For digital time relays, the main conduction path is the power line. Therefore, the main part of suppressing conducted interference is the power supply part of the digital time relay. 1.3 Measures to improve anti-interference Based on the sources and modes of electromagnetic interference and the working characteristics of digital time relays, the measures to improve the anti-interference capability of digital time relays are mainly addressed from the following aspects. (1) Add an EMI filter to the power input terminal. An EMI filter is a low-pass filter, a multi-port network composed of passive components. It can not only attenuate interference caused by conducted propagation, but also has a significant suppression effect on radiated interference. Such a filter is particularly effective for low frequencies (20-100kHz). By selecting a suitable ferrite core, its suppression frequency range can be increased to 400MHz. Due to the small size of digital time relays, the EMI filter is generally large and unsuitable due to structural limitations. Since the relay operates at a low frequency, the design and process requirements are relatively low, and the cost can be reduced. Therefore, it is very feasible to design an EMI filter directly in the circuit. The accessories are strictly screened and can be selected to be close to the ideal state, but there are deviations in reality. The dielectric capacitance and inductance in the filter can be changed. The coupling during the appropriate change can effectively suppress transient interference caused by contact bounce in circuit switches, contactors, and actuators. (2) General measures for anti-interference of digital circuits: ① The clock frequency should be the lowest that is allowed under the working conditions; ② Power lines and control lines must be decoupled to prevent external interference from entering; ③ Decoupling capacitors should be added between the power supply and ground of each integrated circuit. The capacitors should have good high-frequency performance; ④ Decoupling capacitors should be added to signal lines with low speed. (3) Reasonable design of printed circuit boards ① The power and ground lines on the printed circuit board should be laid out in a "well" shape to balance the current and reduce the line resistance; ② When laying out, high and low voltage lines should be separated, and AC and DC lines should be separated; ③ Input and output lines should not be close to electromagnetic hot lines such as clock generators and power lines, and should not be close to fragile signal lines such as reset lines and control lines; ④ Cross wiring between adjacent boards; ⑤ Minimize the effective enclosure area of power line routing to reduce electromagnetic coupling; ⑥ The wiring of adjacent layers should be perpendicular to each other; ⑦ There should be no branches in the routing to prevent reflection and harmonic generation; ⑧ Correctly connect bypass capacitors. When digital circuits are working, the current changes greatly and strong noise signals will be generated. Correctly connect bypass capacitors on the power lines; ⑨ Concentrate grounding points. (4) Reasonable wiring ① Input power lines and ground lines should be as short as possible; ② The connection lines or connector lines between boards should be as short as possible. And the lines are separated; ③ When wiring, the power lines and contact leads should be separated; ④ The positive and negative power lines should be twisted together to reduce common-mode interference. (5) Adopting new processes ① Adopting surface mount technology Adopting surface mount technology can significantly reduce stray parasitic capacitance and inductance caused by the long leads of the device, simplify the shielding design, and thus greatly reduce electromagnetic interference and radio frequency interference. ② Adopting multilayer circuit boards Change from 2-layer printed circuit boards to 4-layer printed circuit boards, which can greatly improve the emission and immunity performance. 2 Conclusion The above describes the anti-interference of digital time relays. Through actual practice, the interference problem existing in the previous digital time relays has been solved, and the reliability of operation has been greatly improved. It has also been confirmed in the field application of a certain power system.