I. Constant Current Charging Stage: Precise Current Control is Key
During the constant current phase, the charging current needs to be stabilized at a set value (usually 0.2C-1.0C) until the battery voltage rises to the cutoff threshold (e.g., 4.2V). Its core circuit consists of three parts: current sampling, error amplification, and power regulation.
Current sampling circuit: A high-precision sampling resistor (e.g., 0.1Ω) is connected in series in the charging circuit, and the sampled voltage is amplified to a range that the chip can handle through a differential amplifier (e.g., INA199). For example, the TP4056 chip sets the charging current through an external resistor connected to the PROG pin, using the following formula:
VPROG is the internal reference voltage (1V), and the current can be adjusted from 0.1A to 1A by adjusting the resistance of RPROG.
Error amplifier design: A symmetrical transconductance operational amplifier (OTA) is used to construct the current loop. Its input is connected to the sampling voltage and the reference voltage, and its output drives the gate of the power transistor. Taking the FS4068 chip as an example, it integrates an improved OTA, which can achieve a current accuracy of ±1% at a switching frequency of 1MHz, while suppressing high-frequency oscillations through a type III compensation network.
Power regulation module: Employs a Buck converter topology, using PWM modulation to control the turn-on timing of the power transistor (e.g., NMOS). When the inductor current reaches the sampling threshold, the comparator triggers a turn-off signal, and energy is transferred to the battery through the diode. This process is repeated cyclically, resulting in a stable constant current output.
II. Constant Voltage Charging Stage: Voltage Closed-Loop Control is Key
Once the battery voltage reaches the cutoff threshold, the charging mode switches to a constant voltage stage. At this point, the voltage needs to be stabilized at 4.2V ± 0.05V, while the current gradually decreases to the termination threshold (e.g., 0.01C). Key design considerations include:
Voltage Sampling and Reference Source: A resistor divider network (e.g., 100kΩ + 22kΩ) is used to sample the battery voltage and compare it with an internal 2.5V reference source. The FS4068 chip uses dual-level detection technology to start constant voltage mode when the battery voltage first reaches 16.8V, and terminates charging when it reaches the threshold a second time, avoiding false triggering.
Dynamic compensation network: During the constant voltage phase, voltage fluctuations caused by sudden load changes (such as changes in battery internal resistance) need to be addressed. The TP4056 employs a Type III compensation network, which improves phase margin through zero-pole cancellation to ensure loop stability. Simulation data shows that during a 0.1A-1A load transition, the voltage overshoot is less than 50mV, and the recovery time is less than 10μs.
Charging termination logic: The charging current is monitored through a current sensing resistor (e.g., 0.05Ω). When the current drops to the termination threshold, the chip turns off the power transistor and outputs a termination signal. The CL4056 chip uses a dual-pin (CHRG/STDBY) indicator to show the charging status: a lit red LED indicates charging in progress, and an off LED indicates termination.
III. Key Technologies in Engineering Implementation
Smoothness of loop switching: When switching from constant current to constant voltage, sudden changes in voltage or current must be avoided. The charging chip based on 0.5μm CMOS technology uses voltage feedforward technology to feed the battery voltage back to the current loop in real time, achieving overshoot-free switching.
Integrated protection mechanisms: Modern charging chips generally integrate over-temperature, over-voltage, and short-circuit protection functions. For example, the DW01 chip detects the discharge current through the CS pin and shuts down the MOSFET when the voltage exceeds 150mV to prevent the battery from being over-discharged.
Low-power design: To meet the needs of portable devices, the chip needs to have a sleep mode. The TP4056 enters sleep mode when the difference between the input voltage and the battery voltage is less than 30mV, and the quiescent current drops to below 2μA, significantly extending the standby time.
IV. Application Case: Charging Management of Four Lithium Batteries
The application of the FS4068 chip in power tools demonstrates the engineering value of CC/CV control. This chip supports a charging current of 1.6A and achieves synchronous rectification with an efficiency of 92% through an external NMOS transistor. Within a temperature range of -40℃ to 85℃, its constant current accuracy remains ±3% and its constant voltage accuracy is ±0.5%, meeting the requirements of the IEC 62133 standard.
Constant current/constant voltage control circuits are the core of lithium-ion battery charging management, and their design must balance accuracy, efficiency, and reliability. With the development of GaN devices and digital control technology, future charging chips will evolve towards higher power density and greater intelligence, providing key technological support for the new energy field.
