Many complex devices—such as automated test equipment, medical instruments and monitoring equipment, data acquisition systems, experimental instruments, and programmable logic controllers (PLCs) for industrial automation—rely on high-precision ADCs to connect the “real world” of analog phenomena with the “processing world” of digital information. The fundamental requirements for an ADC are resolution, accuracy, and bandwidth; other important considerations include signal-to-noise performance, distortion, and latency. Some applications require fast response times to process high-frequency or continuous readings from sensors. In other applications, the ability to multiplex multiple signals within the ADC is important, for example, for PLCs that can simultaneously monitor and integrate real-time input from multiple sensors. Equipment cost, as well as the cost of any required supporting circuitry, is equally important in component selection. This is crucial for ADCs, especially when applied in high-performance multiplexing environments, as the required supporting circuitry can vary significantly depending on the type of ADC chosen. Traditional SAR Methods Typically, the high-performance application types mentioned earlier are designed based on successive proximity register (SAR) ADCs, which can provide a series of “instantaneous images” at consecutive points. SAR ADCs are generally positioned for applications requiring fast response times and relatively low latency. However, due to their high sensitivity to noise and relatively low differential nonlinearity (DNL), they typically require significant support circuitry, increasing overall cost and design complexity. Poor linearity cannot be compensated for by oversampling the signal. To compensate, design engineers must over-refine the ADC and leave margins in the system design. Similarly, in inherently noisy environments, the high noise sensitivity and limited noise rejection of SAR ADCs pose an additional design challenge for engineers, especially when the product is used in a production facility or with PLCs in a multi-band ATE system group. Conversely, ΔΣ ADCs generally deliver better DNL and noise performance and require only relatively simplified support circuitry. However, they are not considered suitable for high-performance applications requiring low latency and high conversion rates to achieve wide signal bandwidth. New Architecture The CS556x/7x/8x series of high-throughput ADCs from Cirrus Logic includes 16- and 24-bit devices built around an advanced high-throughput ΔΣ architecture specifically designed to address conversion speeds up to 200Ksps per conversion. This provides high response and low latency performance, comparable to or better than SAR ADCs, making them a cost-effective alternative in applications where SAR ADCs are typically required. The combination of the single-cycle latency of the CS556x/7x/8x series and a fast FIR filter offers two main advantages. First, the filter operates at nearly twice the sampling frequency, providing users with an unrestricted frequency response. Second, the filter is processed quickly, sending a new output word at the end of the sampling cycle. This single conversion latency allows the new devices to provide noise and DNL performance comparable to ΔΣ ADCs (with very high sampling frequencies and the Nyquist bandwidth of SAR converters). This new design also overcomes the "quiet time" imposed by many traditional SAR devices, during which the ADC output cannot be accessed during sampling. Testing of these new ΔΣ devices demonstrates that storing the digital output at any point in the conversion cycle has no impact on device performance, including at full speed. The advantages of buffered input: SAR converters solve many design challenges and have applications beyond analog signal input. Designers must carefully select components and design circuits to ensure measurement accuracy in the presence of multiple noise sources. This is no small achievement considering that the SAR converter itself can be a large noise source (due to its high-speed comparators and rapidly changing digital circuitry). In contrast, ΔΣ converters offer extremely high accuracy and low noise sensitivity. The new devices feature integrated high-impedance input buffer amplifiers, allowing for easy achievement of fully refined performance without complex external input buffer circuitry. SAR devices typically utilize sample-and-hold circuitry to maintain a stable representation of the received signal sampled during conversion. Therefore, the input often exhibits very low impedance to the signal source. In some applications, this new series of high-throughput ΔΣ devices can (in some cases) be directly driven by the sensor without the buffer amplifiers typically used in SAR. Oversampling at the input, such as when using a 24-bit CS5560/1 device sampling at 160 samples/conversion rates and 8MHz, is largely due to noise caused by low-pass filters in the ΔΣ adjustment coil and digital averaging suppression or neglect in the digital filter. Another problem encountered in current composite signal environments is single-input operation. The CS556x/7x/8x series offers true bipolar analog input capability with ±2.5V input. This is a significant advantage for users measuring ground-referenced AC signals or negative output sensors; a level-shifting amplifier would need to shift a signal below ground level to meet the input requirements of a single-input converter, introducing additional noise and offset errors for sensitive low-level signals. The next section details a performance comparison of key parameters, such as distortion performance and dynamic nonlinearity. Distortion and DHL Figures 1 and 2 show a comparison of distortion performance between a widely used SAR device and the high-throughput ΔΣ CS5571. At a maximum calibration of -12dB, the SAR exhibits a signal distortion (S/D) ratio of 91.6dB, while the CS5571 has an S/D ratio of 100dB. Differential nonlinearity (DNL) is primarily a measurement of code width, normalized to maximum calibration. This is the absolute deviation from the same or average code size, resulting in a difference in voltage step size between one code and another, representing the true difference in code type that affects missing codes, gain, and offset errors. SAR DNL plots measured from a competitor's leading SAR device show the difference in code size, while the matching CS5571 DNL results show lower errors during operation at the same conversion speed. Typical Applications This combination of high resolution and unrestricted signal bandwidth enables designers to perform noise processing and signal filtering tasks tailored to their specific application requirements. Where applicable (even adaptive filtering), the system can dynamically adjust its filters to adapt to changing environments. The most exciting application area is its embedded design capability in PLCs and process control systems. Industrial automation environments are moving towards distributed control, simplified applications, and multifunctional systems suitable for handling various real-time sensor inputs and providing embedded intelligence and closed-loop response to execute local decision loops. High-throughput ΔΣ ADCs enable designers to introduce high resolution and low latency while maintaining a certain level of DNL performance to ensure high measurement accuracy. Real-time closed-loop applications require "no missing codes" functionality and must avoid stepping in ADC transfer functions (which can lead to uncertainty in the operating system state). Automated test equipment (ATE) requires real-time monitoring and processing of multiple synchronous input streams. Here, consistent DNL performance is crucial for obtaining accurate measurement results, especially when continuously monitoring test information for extended periods and monitoring small or even minute signal differences. For ATE systems used to test and measure noise-sensitive equipment, the inherent noise sensitivity of SAR ADCs will interfere with test results. Designers often use SAR converters with higher resolution and speed than required by design, along with average multiple sampling, to achieve the desired system test accuracy. The new series of high-throughput ΔΣ converters can accurately transmit every reading without excessively high resolution sampling rates or post-processing for suboptimal results. In the field of medical instruments, devices such as bedside monitors, blood analyzers, and other diagnostic systems typically employ 12- to 16-bit ADCs. The transition to higher-resolution ADCs allows designers to directly digitize sensor signals without pre-amplification and perform signal gain and bias correction in software, while improving accuracy and analytical flexibility. Weight measurement requires higher accuracy for continuous measurement and is critical for performing high-precision batch control and high-speed weighing functions. Products in actual production can range from bulky items (such as concrete) to small consumer products (such as potato chips), but the need for accuracy and rapid response is crucial to achieving quality and volume targets. New Options Each member of the new family of high-throughput data converters offers unprecedented DNL performance, providing designers with a wider range of choices. In fact, due to the outstanding linearity and noise performance of the 16-bit product family, users can utilize low-speed ADCs in many situations, as well as products that provide perfectly accurate, noise-free readings on every conversion. The data converters emphasize high resolution, low latency, and high sampling rates. It can provide support for applications that require continuous sampling without imposing large input buffers and complex support circuitry or inappropriate constraints on the device's output buffer.