Design of a single-chip microcomputer multi-machine communication system
2026-04-06 06:15:14··#1
Abstract: Integrating microcontroller technology and computer network technology, this paper optimizes the data packet format and control method, introduces frame detection sequences, and designs a microcontroller multi-machine communication protocol based on AT89S52 microcontroller network. The system network topology adopts a bus type, and the network interface circuit adopts port forwarding. The system is easy to expand and has improved stability. The results show that this system design solves the problem of multi-machine communication with 8-bit microcontrollers, realizing communication between client and server machines, as well as communication between clients. Keywords: Microcontroller; Communication protocol; Data packet; Frame; Network interface 1. Introduction With the continuous development of microcontroller and computer technology, the application of microcontrollers has also developed from independent single machines to networks. Multi-machine network systems composed of computers and microcontrollers have become a direction for the development of microcontroller technology. The combination of the two fully utilizes the advantages of microcontrollers in real-time data acquisition and data management. Microcontrollers are widely used in computer network communication and data transmission, real-time control and data processing in industrial automation processes, and have penetrated into all aspects of our lives. Many applications involve multi-machine communication with microcontrollers. However, the way microcontrollers process network data differs from general-purpose computer systems. In particular, some microcontrollers only provide 8-bit data transceiver interfaces, which hinders their application in networking to some extent. Therefore, this study combines microcontroller technology with computer network technology to research a microcontroller-based multi-machine communication system. Based on the design of the microcontroller network communication protocol, the system network topology adopts a bus type, and the network interface circuit uses port forwarding, realizing 8-bit microcontroller multi-machine communication. 2. System Network Protocol Design The proposed network capacity is 1 server and 62 clients, with clients able to communicate with each other. Clients and the server can also communicate with each other. The designed protocol incorporates the stop-and-wait protocol, and the data packets are designed with reference to IP packets. After comprehensive analysis and optimization, the following microcontroller multi-machine communication protocol was developed. (1) Server Protocol ① The server sends query data packets at 1/384 intervals; ② Increments the current query address by 1, and judges whether the current query address is greater than 63. If it is greater than 63, the current query address is set to 1; if it is less than 1, the current query address is set to 62, and proceeds to the next step; ③ Sends a query data packet to the machine at the current query address; ④ Waits for a sending interval; ⑤ If no acknowledgment packet is received, proceeds to retransmit the current data packet, increments the retransmission counter by 1, and if the counter is greater than 2, proceeds to ⑥; If an acknowledgment packet is received, proceeds to ⑦; ⑥ Sets a sending failure flag, clears the retransmission counter to 0, and proceeds to ②; ⑦ Sets a sending success flag, clears the retransmission counter to 0, and proceeds to ⑧; ⑧ Checks if the queried client has data to send. If so, it allocates bus usage rights and time slices, and proceeds to ⑨; otherwise, proceeds to ②; ⑨ Waits for the queried client's end-of-transmission data packet. If received, proceeds to ②. If no data is received within one time slice (1/384s), it is considered a timeout. The server reclaims bus usage rights and proceeds to ②. (2) Client Protocol ① Receives data packets belonging to the local machine; ② If it is an inquiry data packet, checks if the local machine has data to send. If so, it sends "Data to send" to the server and piggybacks on confirmation, then proceeds to ③. Otherwise, it sends "No data to send" to the server and piggybacks on confirmation, then proceeds to ①. Other types of data packets are not processed, and the process proceeds to ①; ③ Waits for network resource allocation of data packets. If received, it sends an confirmation packet and proceeds to ⑤. If a timeout occurs, it stops waiting and proceeds to ①; ④ Waits for confirmation of the previous data packet. If received, it proceeds to ⑤. Otherwise, it proceeds to ⑦; ⑤ Checks if there is still data to send. If so, it sends a data packet and proceeds to ⑥. Otherwise, it sends "End sending" to the server and proceeds to ①. ⑥ Checks if a timeout has occurred. If a timeout occurs, it ends sending and proceeds to ①. Otherwise, it proceeds to ④. ⑦ Retransmits. If more than two retransmissions have been performed, the current transmission has failed, and the process proceeds to ⑤. Otherwise, it proceeds to ④. Therefore, each data packet sent requests confirmation from the recipient. If no confirmation is received, the packet is retransmitted. After more than two retransmissions, the packet is considered unreachable and transmission fails. Furthermore, when a client requests data, if the bus is idle, the server allocates a time slice for it. If the data is not completely transmitted within this time slice, the server forcibly reclaims the bus. Once transmission is complete, the client sends a termination data packet to return the bus usage rights. 3. System Network Topology Design A bus-type network topology is adopted, with each station directly connected to the bus. The server manages the network bus and allocates network resources. A protocol similar to a token bus is used, where the server polls each client to see if it has data to send. If so, a transmission time is allocated, and the bus usage rights are handed over; otherwise, the server polls the next client. The interface circuit relays and forwards received signals. Therefore, data sent by any machine in the network is visible to other machines, and signal reliability is guaranteed to a certain extent. The system network topology design is shown in the figure below: [align=center] Figure 1 System Network Topology Design[/align] 4. Functions and Design of Network Interface Circuit (1) Functions of Network Interface Circuit The main functions of the network interface circuit are as follows: ① Receiving network data elements; ② Forwarding the received data elements to other ports; ③ Multi-port mechanism, mutual forwarding between ports; ④ Submitting received data elements; ⑤ Relaying received data elements; ⑥ Providing network status signals; ⑦ Homogeneous between ports, using crossover cables. (2) Design of Network Interface Circuit To achieve the above functional requirements, the network interface circuit design uses four 74HC245 chips to jointly undertake the data transmission and reception work, with each chip corresponding to one port. Externally, it appears as three ports because one port is occupied by the local machine, and the circuit has been arranged on the circuit board. The ports are connected by crossover cables. When a signal is detected on the receiving line, the chip starts working and divides the signal into three relays. One is sent to the microcontroller, and the other two are sent to the other two ports. If the same signal is detected on the receiving line, the same operation is performed. When the microcontroller sends data to the outside world, it activates the chip corresponding to the microcontroller's transceiver port to relay the signal to the other three ports and continuously monitors changes in the received signal. Once a change from high to low is detected, it indicates that data needs to be received. After reception, an interrupt signal is generated, and the processing program is started. The network interface circuit includes a network status signal BUS. When none of the chips are working, it indicates that there is no data transmission on the network. At this time, BUS is inverted to a low level by a NOT gate circuit and connected to the microcontroller's second interrupt pin. The microcontroller can use this pin to grasp the network status and send data packets. The network interface circuit also includes an indicator signal. When data is received, the signal is set high, and the LED connected to the signal will light up to indicate that data has been received. 5. Client and Server Circuit Design The system has two different circuits: client and server. The client and server circuits are integrated on a single circuit board, meaning both circuits are represented on the same board. For the client, the client does not need a separate control circuit, but it needs addressing, hence the need for an address acquisition circuit. For the server, it does not need to be addressed and is uniformly fixed at address 65, so there is no need for the address acquisition part of the circuit. The server is responsible for the monitoring and polling of the entire network. Other circuits are homogeneous with the client and server, so no modifications are needed. On the circuit board, the two different circuits are implemented on the same circuit board without inserting components, which greatly reduces the development cost. 6. System Functional Module Diagram (1) System Functions: Server Part ① Completes network polling and sends query data packets to the machines in the network at regular intervals. ② Read ADC data and display the current ambient temperature ③ Control a damper and display motor angle data ④ Scan the keyboard and provide key control ⑤ Collect damper information from the network and intelligently control the fan ⑥ Control the opening and closing of the laboratory lighting circuit ⑦ Able to take over any client machine in the network Client machine part ① Receive polling from the server and send confirmation data packets ② Read ADC data and display the current ambient temperature ③ Control a damper and display motor angle data ④ Scan the keyboard and provide key control ⑤ Read the local address ⑥ Receive management operations from the server (2) Functional division: The software system adopts a modular approach, with each device having its own driver program. The driver program is responsible for driving the device it controls and providing interfaces to other programs for easy access and control. The functions of each driver program are divided as follows: ① Digital tube driver program: Drives the digital tube display and displays data in a specified manner. ② Keyboard driver program: Dynamically scans the keyboard, identifies key presses, and avoids circuit glitches. ③ Buzzer driver program: Drives the buzzer to sound in a specified manner. ④ ADC driver: Reads data from the analog-to-digital converter and converts it into temperature values. ⑤ Serial port driver: Sends and receives data packets and filters non-local data packets. It also includes a polling module that, driven by a clock, sends query data packets to each client in the network at regular intervals. If no response is received twice, the data packet transmission is considered a failure. It can also send management data packets to the managed client. Similarly, confirmation is required; more than two confirmations are considered a failure. The system functional module diagram is shown in Figure 2. [align=center] Figure 2 System Functional Module Diagram[/align] As shown in the figure, all drivers are attached to the clock interrupt, which calls these drivers at a certain frequency. 7. Summary The system designs a network-based control and management system. It integrates computer network technology and microcontroller technology. The network protocol design references the stop-and-wait protocol and TCP/IP protocol in computer networks, but optimizes the data packet format and control method to better adapt to microcontroller processing, greatly improving processing speed and efficiency. Simultaneously, a frame detection sequence is introduced to provide a data packet detection mechanism, improving network reliability. The system network topology adopts a bus type, and the network interface circuit adopts a port forwarding form, which is convenient for expansion and improves stability. This system is designed with complete functions and can control all clients in the entire network through the server and monitor the operation of all clients; the system is simple to operate and has certain economic significance and practical value. References [1] Christa Anderson, Mark Minasi. Mastering Local Area Networks [M]. Sybex Publishing House, 1999. [2] Jiang Xiaoan, Dong Xiufeng. Analog Electronics Technology [M]. Xi'an University of Electronic Science and Technology Press, 2002. [3] Zhang Yongrui, Yang Linyao, Zhang Yalan. Circuit Analysis Fundamentals [M]. Xi'an University of Electronic Science and Technology Press, 2001. [4] Barry B. Brey. Programming the 80286, 80386, 80486, and Pentium-Base