1. Introduction In instrumentation and measurement and control technology, wireless data communication has attracted widespread attention due to its advantages such as saving transmission lines and ease of use. Short-to-medium range (less than 500 meters) wireless communication has a broad market in practical applications such as automatic testing systems, wireless meter reading, computer telemetry and remote control systems, vehicle monitoring systems, and community management. Among numerous wireless transceiver chips, the nRF401 is widely popular due to its low cost, high reliability, and simple peripheral design. However, due to the complexity of the communication space, wireless communication systems are prone to bit errors, and even when the transmitting end does not transmit data, the receiving end can still receive a large amount of interference data. In a medium-sized system design, the CPU performs multiple operations, such as accessing external memory and processing sensor data. Therefore, when there is significant wireless communication interference, especially in interrupt-driven communication mode, frequent interrupts will severely impact the main program's operation. Furthermore, since operating the nRF401 involves not only controlling input/output but also managing its transmit/receive status and operating mode, traditional design approaches encounter difficulties when the wireless communication section is treated as an independent ID module in a bus-based system (such as RS-485 communication mode). Therefore, an intermediate processing stage is needed to effectively filter information without affecting the communication rate. To address these issues, this design uses the nRF401 as the wireless transceiver chip and two AT89C2051 chips as control chips to create a wireless communication system. One AT89C2051 microcontroller (defined as control chip A) controls the nRF401. The AT89C2051's I/O interface works in conjunction with the serial port to control the nRF401 for asynchronous communication. The other AT89C2051 microcontroller (defined as control chip B) satisfies the requirements of the bus serial port and solves the problem of control chip A's inability to respond to the bus in a timely manner due to frequent serial interrupts, thus playing a role in task sharing, interference isolation, and serial port expansion. Compared with a single dual-serial-port microcontroller design, using two 2051 microcontrollers reduces costs, improves chip utilization, and isolates interference. Practice shows that the system has a simple structure, strong anti-interference capability, and can effectively solve the problem of wireless communication between short-range systems. 2. System Hardware Design The system hardware design includes a wireless communication module and a communication control section. 2.1 Design of the Wireless Communication Module Based on nRF401 The nRF401 is a single-chip UHF wireless transceiver chip developed by Nordic Corporation, operating in the 433MHz ISM band. In receive mode, the nRF401 is configured as a traditional heterodyne receiver. The received RF-modulated digital signal is amplified by a low-noise amplifier, converted to an intermediate frequency by a mixer, amplified, filtered, and then sent to a demodulator. After demodulation, it is converted into a digital signal output (DOUT terminal). In transmit mode, the digital signal is input through the DIN terminal, processed by a phase-locked loop and a voltage-controlled oscillator, and then sent to the RF output of the power amplifier. In this system design, to avoid interference, the wireless transceiver section based on the nRF401 is placed on a separate PCB board, with a communication control interface (J1) brought out to form an independent wireless transceiver module. 2.2 Control System Design Based on AT89C2051 The control section includes two AT89C2051 chips. Control chip A is responsible for processing data information from the wireless transceiver module and communicates with control chip B through the P1 port in interrupt 1 mode. Control chip B is responsible for processing information from the serial port and communicating with control chip A. Since the two AT89C2051 chips transmit data in parallel interrupt mode, their data exchange time is much shorter than the microcontroller's serial communication time, thus not affecting the overall system's half-duplex communication time. To meet various requirements, the serial port is designed to support RS232, RS485, and UART modes via jumpers. 3. System Software Design 3.1 Communication Protocol In wireless communication, the bit error rate is usually high due to external interference. Even if the transmitter does not send data, the receiver will often receive messy data caused by external interference. To distinguish whether the received data is valid during reception, a certain communication protocol is necessary. When the amount of data transmitted is small, the following communication protocol is designed for effective information processing: 1. The wireless transceiver data frame consists of 3 bytes: an 8-bit identifier (0xab), an 8-bit data bit, and an 8-bit check bit. 2. Wireless transceiver data frame format: byte1: High four bits are 1010 (0xa), low four bits are the high four bits of the data; byte2: High four bits are 1011 (0xb), low four bits are the low four bits of the data; byte3: XOR value of byte1 and byte2. 3. Data transmitted between internal microcontrollers does not include the identifier byte and check byte. 4. When the system communicates serially with external systems, a different communication protocol (such as Mod Bus protocol) is used. 5. External input uses interrupt mode, and internal loops use polling mode. 6. In program design, external interrupts take priority to ensure timely reception of external data. 7. When executing one interrupt, other interrupts are not responded to. 8. The wireless communication module is normally in receiving mode. 3.2 Program Flow: For control chip A, receiving data from the wireless transceiver module is done via serial interrupt mode; receiving data from control chip B is done via external interrupt 1 mode. During the main program's execution, it continuously loops through the system status word detection loop. When the transmit buffer contains data (from control chip B), the main program calls the serial transmit program to send the data via the serial port and wireless transceiver module. When the receive buffer contains data (from the wireless transceiver module), the main program calls the parallel transmit program to send the data to control chip B via port P1. The transmit and receive buffers should be designed to be multi-byte to store data that cannot be transferred immediately. The program flow of control chip B is similar to that of control chip A, except that the method of data frame verification differs when receiving serial port data. Figure 4 shows the program flowchart, where UART() is defined as the serial interrupt service routine; Int1() is defined as the external interrupt 1 interrupt service routine; TranByte is defined as the transmit buffer; RecByte is defined as the receive buffer; Recsum is defined as the receive buffer count; Transum is defined as the transmit buffer count; delay is defined as the delay subroutine; flag is defined as the system status control word, where flag.7 is defined as the receive buffer status flag; and flag.6 is defined as the transmit buffer status flag. 4. Application in Autonomous Mobile Robot Systems In autonomous mobile robot systems, a reliable and stable communication system is crucial for information exchange between the robot and the host computer, and between robots themselves. A wireless communication system based on nRF401 can serve as the wireless communication component for small and medium-sized autonomous mobile robots. In this application, this system is connected to the computer's serial port in RS232 mode via a jumper, while another system is set to UART mode to form a multi-machine communication system with other parts of the robot. This constructs a wireless communication system between the robot and the host computer. 5. Conclusion This paper presents a wireless communication system design based on the nRF401 microcontroller. This system features simple hardware circuitry, low cost, easy programming, and high reliability. It can be readily applied to various bus-structured systems as their wireless communication component, enabling bidirectional wireless data transmission. The security and reliability of the wireless communication system depend on good software design. Due to external interference, the wireless communication system is prone to bit errors. The short frame structure and three-byte checksum method used in the wireless communication program design have proven to be very effective in filtering bit errors. Furthermore, tests show that within the maximum communication rate range, appropriately increasing the communication rate can reduce the bit error rate.