Abstract: This paper analyzes and discusses serial communication using multiple protocols. Using a multi-protocol serial port chip manufactured by Linear Technology, and addressing the problems in traditional serial communication implementations and the needs of practical wide area network (WAN) serial communication, a design and implementation method for a multi-protocol serial interface is proposed. Keywords: Multi-protocol serial communication; communication protocol; transceiver; connector; multi-protocol serial port chip; LTC1546/LTC1544 With the further development of communication network technology, more and more Internet devices (such as routers, switches, gateways, and access devices) are being designed in wide area networks (WANs) to support multiple physical interface protocols or standards for their serial interfaces. WAN serial port protocols include RS-232, RS-449, EIA-530, V.35, V.36, and X.21. Figure 1 shows a simple schematic diagram of a serial communication interface. As shown in the figure, the key to realizing multi-protocol serial communication is to convert the different transmission modes (balanced and unbalanced) and different electrical signals sent from the connector into TTL level signals that the terminal can recognize and process. 1 Characteristics and problems of traditional multi-protocol communication 1.1 "Daughterboard" method The common implementation method in wide area network serial port applications is to provide an independent daughterboard for each required physical protocol. A system supporting EIA-232, EIA-449 and V.35 protocols usually requires three independent daughterboards and three different connectors. Since each protocol requires a daughterboard, the system needs to manage the PCB daughterboards, transceiver chips, connectors, etc., which wastes resources and complicates management. 1.2 Universal connector method To solve the shortcomings of the "daughterboard" method, a motherboard and universal connectors can be used. A motherboard has multiple transceiver chips, which can meet the requirements of multiple serial port protocols and share some common components, while reducing resource waste. In configuration, attention should be paid to the problems caused by the limited number of connector pins. A better approach is to allocate pins based on signals rather than protocols, that is, assign a universal pin to each signal, regardless of its physical protocol definition. For example, for EIA-232, EIA-449, EIA-530, V.35, and V.36, their TxD signals can be connected to the same pins on the connector. That is, the SD (a) signal is connected to pin 2, and the SD (b) signal is connected to pin 14. This pair of pins is then used to describe the transmit signals TxD for all protocols. This method also introduces a problem: all transceiver I/O lines to the universal connector pins must be shared. For example, the transmit data signal line of a V.28 driver chip is connected to pin 2 of the DB-25 connector; at the same time, the transmit data signal line of a V.11 driver chip is connected to pins 2 and 14 of the connector; and the transmit data signal line of a V.35 driver chip is also connected to pins 2 and 14 of the connector. In this configuration, pin 2 of the universal connector will have three signal lines connected simultaneously, and pin 14 will have two signal lines connected. Therefore, in this configuration, all drivers must be tri-state to disable unnecessary outputs. If the transceiver does not have tri-state capability, a multiplexer is required to select the appropriate output. Another issue arising from this is leakage current generated when the transceiver is disabled. If the V.28 protocol is selected, its theoretical output voltage is 15V. In this case, drivers for the V.11 protocol will be disabled, and in tri-state mode, their output leakage voltage must be low enough to ensure that the V.28 protocol driver signal connected to the same connector pin is not affected. If there is an isolating switch between the transmitter and receiver, leakage current must also be considered for the switch. 1.3 Serial Port DTE/DCE Mode Switching Switching between DTE and DCE modes can be achieved by selecting different connector conversion cables. This minimizes the complexity of the transceiver when implementing DTE/DCE conversion, but the disadvantage is the need to replace cables, especially when the device placement is inconvenient or frequent DTE/DCE switching is required. If the transmission cable remains unchanged, two transceivers can be configured to support DTE and DCE modes respectively. The driver output of the DTE transceiver is connected to the receiver input of the DCE transceiver, and the receiver input is connected to the driver output of the DCE transceiver. To control DTE or DCE mode, the driver or receiver output must be tri-state. When DTE mode is selected, the DCE chip is disabled, and its driver and receiver are tri-state, and vice versa. While this method solves the problem of frequent cable replacement, it significantly increases the design cost due to the use of an additional transceiver, and the serial port board is also much larger. 2. Implementation Principle of Multi-Protocol Serial Communication In traditional designs, a specific transceiver chip is typically selected for a particular protocol. For example, for the RS-232 protocol, transceiver chips such as DS-1488/DS-1489, MAX232, or SP208 are commonly used; while for the RS-449 protocol, transceiver chips such as SN75179B, MAX488, and MAX490 are commonly used. When using RS-232, RS-422, and V.35 protocols simultaneously, multiple transceiver chips are needed to support different protocols. Currently, some transceiver manufacturers have developed multi-protocol transceiver chips. Sipex was the first company to produce the SP301, a software-selectable protocol chip for RS-232/RS-422. This chip integrates the electrical characteristics of RS-232 and RS-422 transceivers into a single chip. The SP50X series can support up to eight protocol standards. Other manufacturers, such as Linear Technology, produce LTC154x and LTC284x series chips that also have the above functions. Users can choose the appropriate chip according to their needs. Figure 2 shows a communication card that uses discrete transceiver chips and a single multi-protocol transceiver chip to implement multi-protocol serial communication. As can be seen from the figure, the former is much more complex than the latter. The specific performance comparison is shown in Table 1. Table 1 Performance Comparison of Two Methods for Implementing Serial Communication [table=98%][tr][td=1,1,27%] [td=1,1,36%]Discrete Component Board[/td][td=1,1,37%]Comprehensive Component Board[/td][/tr][tr][td=1,1,27%]Power Supply Voltage[/td][td=1,1,36%]+5V, -5V, +12V, -12V[/td][td=1,1,37%]+5V[/td][/tr][tr][td=1,1,27%]Required Number of transceiver chips: 12 Supported physical layer protocols: RS-232, RS-422, RS-449, EIA-530, V.35, V.36 RS-232, R S-422, RS-449, RS-485, EIA-530, EIA-530A, V.35, V.36 [td=1,1,27%]Protocol Selection Method[/td][td=1,1,36%]Jumper or Switch[/td][td=1,1,37%]Software or Hardware (via internal decoding)[/td][/tr][tr][td=1,1,27%]Serial The interface size is very small, requiring additional hardware support besides the 15 transceiver chips. Power consumption is approximately 1W, or approximately 100mW to 250mW, compared to discrete transceiver chips. Furthermore, multi-protocol transceivers offer significantly easier driver enable control and leakage current handling compared to discrete transceiver chips. When a protocol is selected via software or hardware, the electrical parameters of the driver and receiver are adjusted appropriately. The circuitry automatically controls the driver's output level, the receiver's input threshold, the impedance values ​​of both the driver and receiver, and the common mode range for each physical layer protocol. Furthermore, the requirement of external network terminals for V.35 makes the connection with V.35 transceivers more complex than with other protocols. When using discrete transceiver chips, expensive relay switching resistors are often used to disconnect the V.35 network terminal when selecting other protocol interfaces, or users are required to change the terminal module every time a new interface standard is selected. This is wasteful of resources and complicates the interface circuitry, making it an undesirable implementation method. Multi-protocol serial port chips, however, automatically provide appropriate terminals and on-chip switches to comply with V.10, V.11, V.28, and V.35 electrical protocols, thus solving the cable termination conversion problem. 3. Multi-protocol Communication Based on LTC1546/44 To illustrate the working principle of multi-protocol serial port chips, the Linear Technology LTC1546/1544 chip will be analyzed as an example. 3.1 Performance of LTC1546/LTC1544 The LTC1546 chip is a 3-driver/3-receiver transceiver with the following key features: ● Software-selectable transceiver supporting RS232, RS449, EIA530, EIA530A, V.35, V.36, and X.21 protocols ● On-chip cable termination available ● Pin compatible with LTC1543 ● Can perform full DTE or DCE with LTC1544 ● Operates on a single 5V supply ● Small footprint. The LTC1544 chip is a 4-driver/4-receiver transceiver with the following key features: ● Software-selectable transceiver supporting RS232, RS449, EIA530, EIA530A, V.35, V.36, and X.21 protocols ● Software-selectable cable termination using the LTC1344A ● Full DTE or DCE port implementation using the LTC1543, LTC1544A, or LTC1546 ● Operates on a single 5V supply, similar to the LTC1543. Both chips are packaged in a 28-lead SSOP surface mount package, and their pinout is shown in Figure 3. The LTC1546/LTC1544 can form a complete software-selectable DTE or DCE interface for use in data networks, Information Service Units (CSUs) and Data Service Units (DSUs), or data routers. It supports multiple protocols, and the cable termination is provided on-chip, eliminating the need for a separate termination design. In this configuration, half of each port of the LTC1546 is used to generate and appropriately terminate clock and data signals. The LTC1544 is used to generate control signals and the Local Loop-back (LL) signal. The interface protocol is determined by the mode selection pins M0, M1, and M2, as shown in Table 2. Table 2 Communication Protocol Mode Selection [table=98%][tr][td=1,1,20%]LTC1546 Mode Name[/td][td=1,1,8%]M2[/td][td=1,1,7%]M1[/td][td=1,1,8%]M0[/td][td=1,1,10%]DCE/DTE[/td][td=1,1,8%]D1[/td][td=1,1,8%]D2[/td][td=1,1,8%]D3[/td][td=1,1,8%]R1[/td][td=1,1,7%]R2[/td][td=1,1] ,8%]R3[/td][/tr][tr][td=1,1,20%]Not used (default V.11)[/td][td=1,1,8%]0[/td][td=1,1,7%]0[/td][td=1,1,8%]0[/td][td=1,1,10%]0[/ td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,7%]V.11[/td][td=1,1,8%] [tr][tr][td=1,1,20%]RS530A[/td][td=1,1,8%]0[/td][td=1,1,7%]0[/td][td=1,1,8%]1[/td][td=1,1,10%]0[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,8%]V.11[/td][td=1,1,7%]V.11[/td] [td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]RS530[/td][td=1,1,8%]0[/td][td=1,1,7%]1[/td][td=1,1,8%]0[/td] [td=1,1,10%]0[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,8%]V.11[/td][td=1,1 ,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]X.21[/td][td=1,1,8%]0[/td][td=1,1,7%]1[/td][td=1 ,1,8%]1[/td][td=1,1,10%]0[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,8%]V.11 [td=1,1,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]V.35[/td][td=1,1,8%]1[/td][td=1,1,7%]0[/td][td=1,1,8%]0[/td][td=1,1,10%]0[/td][td=1,1,8%]V.35[/td][td=1,1,8%]V.35[/td][td=1,1,8%]Z[/td][td] =1,1,8%]V.35[/td][td=1,1,7%]V.35[/td][td=1,1,8%]V.35[/td][/tr][tr][td=1,1,20%]RS449/V.36[/td][td=1,1,8 %]1[/td][td=1,1,7%]0[/td][td=1,1,8%]1[/td][td=1,1,10%]0[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][t d=1,1,8%]Z[/td][td=1,1,8%]V.11[/td][td=1,1,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]V.28/R S232[/td][td=1,1,8%]1[/td][td=1,1,7%]1[/td][td=1,1,8%]0[/td][td=1,1,10%]0[/td][td=1,1,8%]V.28[/td][td= 1,1,8%]V.28[/td][td=1,1,8%]Z[/td][td=1,1,8%]V.28[/td][td=1,1,7%]V.28[/td][td=1,1,8%]V.28[/td][/tr][tr] [td=1,1,20%]No cable[/td][td=1,1,8%]1[/td][td=1,1,7%]1[/td][td=1,1,8%]1[/td][td=1,1,10%]0[/td][td=1,1,8%]Z[ /td][td=1,1,8%]Z[/td][td=1,1,8%]Z[/td][td=1,1,8%]Z[/td][td=1,1,7%]Z[/td][td=1,1,8%]Z[/td][/tr][tr][td= 1,1,20%] Not used (default V.11) [/td][td=1,1,8%]0[/td][td=1,1,7%]0[/td][td=1,1,8%]0[/td][td=1,1,10%]1[/td][td=1,1,8% ]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,7%]V.11[/td][td=1,1,8%]V.1 1[/td][/tr][tr][td=1,1,20%]RS530A[/td][td=1,1,8%]0[/td][td=1,1,7%]0[/td][td=1,1,8%]1[/td][td=1,1,10%]1 [td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]RS530[/td][td=1,1,8%]0[/td][td=1,1,7%]1[/td][td=1,1,8%]0[/td] [td=1,1,10%]1[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1 ,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]X.21[/td][td=1,1,8%]0[/td][td=1,1,7%]1[/td][td=1 ,1,8%]1[/td][td=1,1,10%]1[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][td=1,1,8%]Z [/td][td=1,1,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]B.35[/td][td=1,1,8%]1[/td][td=1,1,7% ]0[/td][td=1,1,8%]0[/td][td=1,1,10%]1[/td][td=1,1,8%]V.35[/td][td=1,1,8%]V.35[/td][td=1,1,8%]V.35[/td] [td=1,1,8%]Z[/td][td=1,1,7%]V.35[/td][td=1,1,8%]V.35[/td][/tr][tr][td=1,1,20%]RS449/V.36[/td][td=1,1,8 %]1[/td][td=1,1,7%]0[/td][td=1,1,8%]1[/td][td=1,1,10%]1[/td][td=1,1,8%]V.11[/td][td=1,1,8%]V.11[/td][t d=1,1,8%]V.11[/td][td=1,1,8%]Z[/td][td=1,1,7%]V.11[/td][td=1,1,8%]V.11[/td][/tr][tr][td=1,1,20%]V.28/R S232[/td][td=1,1,8%]1[/td][td=1,1,7%]1[/td][td=1,1,8%]0[/td][td=1,1,10%]1[/td][td=1,1,8%]V.28[/td][td= 1,1,8%]V.28[/td][td=1,1,8%]V.28[/td][td=1,1,8%]Z[/td][td=1,1,7%]V.28[/td][td=1,1,8%]V.28[/td][/tr][tr] [td=1,1,20%]No Cable[/td][td=1,1,8%]1[/td][td=1,1,7%]1[/td][td=1,1,8%]1[/td][td=1,1,10%]1[/td][td=1,1,8%]Z[/td][td=1,1,8%]Z[/td][td=1,1,8%]Z[/td][td=1,1,8%]Z[/td][td=1,1,7%]Z[/td][td=1,1,8%]Z[/td][/tr][/table] As shown in Table 2, if the port is set to V.35 mode, the mode selection pins should be M2=1, M1=0, and M0=0. At this time, for control signals, the driver and receiver will operate in V.28 (RS232) mode; while for clock and data signals, the driver and receiver will operate in V.35 mode. Mode selection can be achieved by controlling pins M0, M1, and M2 via a control circuit (or by connecting the mode pins to ground or Vcc using jumpers), or by external selection control via a suitable interface cable plugged into the connector. If the latter is used, when the cable is removed, all mode pins are unconnected, i.e., M0=M1=M2=1, and the LTC1546/LTC1544 enters cableless mode. In this mode, the supply current of the LTC1546/1544 will drop below 500μA, and the LTC1546/LTC1544 driver output will be forced into a high-impedance state. Meanwhile, receivers R2 and R3 of the LTC1546 should be terminated with 103Ω resistors, while other receivers on the LTC1546 and LTC1544 should be grounded through 30kΩ resistors. Driver 3/Receiver 1 in the LTC1546, Driver 3/Receiver 1 and Driver 4/Receiver 4 in the LTC1544 can be enabled via the DCE/DTE pins; the INVERT signal in the LTC1544 enables Driver 4/Receiver 4. The LTC1546/LTC1544 can be set to DTE or DCE operating mode using one of two methods: one is to connect a dedicated connector with the appropriate polarity to the DTE or DCE pin; the other is to send signals to the LTC1546/LTC1544 via a dedicated DTE cable or a dedicated DCE cable, using a single connector to create an operating mode suitable for both DTE and DCE. 3.2 Typical Application Figure 4 shows a multi-protocol serial communication circuit with a DB-25 connector port that can be set to DTE or DCE operating modes. In the figure, the LTC1546/LTC1544 chip is connected to the connector on one side and to the HDLC chip on the other. The M0, M1, M2, and DCE/DTE pins are connected to the EPLD hardware control circuit to select the communication protocol and operating mode. The DTE or DCE operating modes require corresponding cable connections to ensure correct signal transmission. For example, in DTE mode, the TxD signal is sent to pins 2 and 14 via driver 1 of the LTC1546. In DCE mode, the driver sends the RxD signal to pins 2 and 14. In Figure 4, the LTC1546 uses an internal capacitive charge pump to satisfy VDD and VEE. VDD is the positive power supply voltage terminal compliant with V.28, and a 1F capacitor should be connected to ground at this terminal; VEE is the negative power supply voltage terminal. A voltage multiplier will generate approximately 8V on VDD, while a voltage inverter will generate approximately -7.5V on VEE. Four 1μF capacitors are surface-mount tantalum or ceramic capacitors, with a minimum capacitance of 3.3μF at the VEE terminal. All capacitors should have a voltage rating of 16V and should be placed as close as possible to the LTC1546 to minimize EMI interference. In V.35 mode, switches S1 and S2 in the LTC1546 will be on, and a T-type network impedance should be connected to parallel the receiver's 30kΩ input impedance with the T-network terminal. This will not significantly affect the total input impedance, so the circuit design in this mode is identical to other modes for the user. Since the LTC1546 is a 3-driver/3-receiver transceiver and the LTC1544 is a 4-driver/4-receiver transceiver, the LTC1546/LTC1544 will not have enough drivers and receivers if RL, LL, and TM signals are used simultaneously. Therefore, the LTC1545 can be used to replace the LTC1544. The LTC1545 is a 5-driver/5-receiver transceiver capable of handling multiple selectable control signals, such as TM and RL. All LTC1546/LTC1544 receivers have fail-safe protection in all modes. If the receiver inputs are floating or shorted together through a terminating resistor, the receiver output will always be forced to a logic high level. 4 Conclusion There are many methods to implement multi-protocol serial communication, and different manufacturers offer serial port chips with varying functions. Designers can choose according to their needs. When designing a complex DTE/DCE mode that supports various physical layer protocols, choosing a monolithic multi-protocol serial transceiver will simplify configuration compared to using many discrete components, and the designed circuit will be more flexible, convenient, and simple.