Abstract: The study of the dynamic performance of bipolar junction transistors (BJTs) is reflected in the analysis of dynamic parameters. This paper analyzes in detail the dynamic parameters such as switching characteristics, capacitance, capacity, and switching losses, and explains the significance of these dynamic parameters from a physical perspective, which has guiding significance for practical applications. Keywords: Physical research; Dynamic performance; Dynamic parameters; Bipolar junction transistor 1 Introduction Power semiconductor devices are the foundation of power electronics technology and the heart of power semiconductor devices. The characteristics of power semiconductor devices directly affect the size, weight, price, and performance of power electronic systems. Since the 1980s, with the rapid development of microelectronics technology, microelectronics and power electronics have combined on the basis of their respective development to produce a generation of high-frequency, fully controllable power integrated devices. Among the many new semiconductor devices, electrostatic induction (SI) devices are a newly developed and unique power semiconductor device, and have developed into a fairly large SI family. The main varieties of this family include power SITs, ultra-high frequency SITs, microwave SITs, bipolar mode electrostatic induction transistors (BSITs), electrostatic induction thyristors (SITHs), and electrostatic induction integrated circuits (SIT-ICs). The bipolar mode electrostatic induction transistor (BSIT) is a novel device that combines the functions of a stationary electrostatic induction transistor (SIT) and a bipolar junction transistor (BJT), taking advantage of their respective strengths. It boasts advantages such as high operating frequency, wide bandwidth, high output power, high gain, high input impedance, easy drive, low output impedance, and good thermal stability. Because electrostatic induction devices have large current capacity and fast switching speed, they are suitable as high-power switching devices. Therefore, when studying the performance of electrostatic induction devices, not only static parameters such as leakage current, amplification factor, and breakdown voltage should be included, but also dynamic parameters such as turn-on time, turn-off time, and power loss should be considered. This paper, based on a brief analysis of the working principle of BSIT, conducts a physical analysis of the dynamic performance of the bipolar mode electrostatic induction transistor BSIT, explaining the significance of the switching characteristics, di/dt capacitance, and switching losses of BSIT from a physical perspective. 2. Working Principle of BSIT BSIT has a very low epitaxial doping concentration and a very small gate pitch. The channel is pinched off at zero gate voltage, so it is usually in a normally off state, belonging to the normally off type device. A schematic diagram of the BSIT structure is shown in Figure 1. [align=center]Figure 1. Schematic diagram of BSIT structure[/align] By selecting appropriate structural parameters (gate spacing, gate diffusion depth, and material doping concentration, etc.), under the influence of the built-in electric field of the gate junction, the depletion layer will fully cross-link within the channel and form a sufficiently high electronic barrier. When no gate bias is applied, although the drain-source voltage has some effect on lowering the barrier, because the channel is already in a fully pinch-off state, the drain-source voltage alone will not provide enough electrons to cross the barrier and form a significant drain-source current. When the gate voltage is negative (V[sub]GS[/sub]<0), the gate-channel pn junction is reverse biased, the channel barrier rises further, and the device is in a completely pinch-off state. The blocking voltage VDS gives the device's breakdown voltage. When V_G is constant, and V_D rises to a certain value, a small current flows through the device. This current is a majority carrier current, belonging to the barrier control current. At this time, the device operates in unipolar mode, and its IV characteristics exhibit bipolar junction characteristics, with a certain displacement along the V_D axis. This displacement voltage gives the device's "characteristic voltage." When the gate voltage is positive and sufficiently large, the gate-channel pn junction is forward biased, and minority carrier holes are injected into the channel from the gate. The participation of minority carriers fundamentally changes the device's operating mechanism. As the gate voltage increases, the injected holes continuously increase, and corresponding electrons are injected from the source region, forming a high-concentration electron-hole plasma in the channel region and epitaxial layer (within a certain range). This makes the region develop into a quasi-neutral region and produces a significant conductivity modulation effect. The electric field in this region is very small, and the corresponding voltage drop is also very small, allowing large leakage current to pass through. The device is in the on state, also known as the saturation state. At this time, the magnitude of the current is modulated by the injected minority carriers (holes). It is a current-controlled type. This state is called bipolar mode. Large current and very low on-state voltage drop are the basic characteristics of this mode. The IV characteristics are similar to those of a pentode. 3 Physical analysis of the dynamic performance of BSIT (1) Physical analysis of the switching characteristics of BSIT Bipolar electrostatic induction transistor is a new type of power switch, and its structure is similar to that of vertical channel JFET. However, due to the very low doping concentration of the epitaxial layer, the small gate spacing, and the short gate length, the gate region is closer to the source region, so the gate has stronger control over the current and exhibits better electrical characteristics than JFET. Under negative gate voltage, the current mainly acts as a channel barrier control mechanism. As the gate voltage gradually increases from negative to positive, the device transforms from a barrier control mechanism to a minority carrier injection control current mechanism. When the forward gate voltage is very low, the hole concentration injected into the channel from the gate is very low. Simultaneously, due to the barrier effect of the channel, the electron concentration injected into the channel from the source is also very low. At this point, the barrier still exists. Under the influence of the drain voltage, electrons move through the channel towards the drain. Simultaneously, due to the built-in potential of the gate junction, the electron current flowing into the gate is negligible, and the electron concentration gradually decreases along the channel centerline towards both gates. Statically, the electron current in the channel will compensate for the ionized doping charge, thus equivalent to a decrease in doping concentration, i.e., a decrease in the required pinch-off voltage. As the gate voltage increases, due to the reflection effect of the source high-low junction, holes accumulate in the channel region near the source, lowering the barrier. Injected minority carriers (holes) participate in the barrier modulation current. If the gate voltage V_G rises high enough, the barrier completely disappears, and the injected holes in the channel will form a conductivity modulation region with the electrons injected from the source, increasing the gate current. The device operates under a bipolar mechanism, forming a high-concentration electron-hole plasma within a certain range of the channel region and epitaxial layer. This makes the region a quasi-neutral region and produces a significant conductivity modulation effect. The electric field in this region is very small, resulting in a small voltage drop, allowing for large leakage current; at this point, the device is in the on-state. This completes the turn-on process from the off-state to the on-state. The gate turn-off mechanism of the BSIT is as follows: In the BSIT on-state, a large number of minority and majority carriers exist simultaneously in the n-high-resistivity layer. When a reverse gate voltage is applied between the gate and cathode to turn off the BSIT, holes stored near the p+ gate are swept towards the gate, while some channel electrons flow into the n+ cathode region. This carrier flow induces (leads to) a reverse recovery current in the p+-n--n+ diode. Most of the charge carriers stored in the n-high-resistivity layer will be swept away through the p+ gate and n+ cathode regions. When the channel barrier rises high enough to cut off the electrons injected from the cathode region, the main conduction anode current is suddenly cut off, and the device enters the off state. (2) Physical analysis of the di/dt capacity of BSIT Since the turn-on time of BSIT is very short, a large current change rate di/dt will be generated during its turn-on process. BSIT is not affected by the plasma diffusion rate. Therefore, it has a large di/dt capacity. The turn-on rate of BSIT depends on the channel barrier elimination rate on the one hand and the formation speed of the conductive channel on the other hand. This process is directly related to the contraction of the depletion layer in the channel. Therefore, in order to enable BSIT to turn on quickly, a low-impedance gate drive circuit must be used. Figure 2 shows the depletion layer situation of BSIT in the on state and the off state. [align=center] Figure 2 Schematic diagram of the depletion layer in the on and off states of BSIT[/align] The width d of the conductive channel formed between the gates can be determined by equation (1): (1) In the equation, a is the half gate pitch, N[sub]D[/sub] is the doping concentration of the base region, V[sub]G[/sub] is the applied gate bias voltage, Φ is the built-in potential of the gate junction, ε[sub]0[/sub] is the free space dielectric constant, and ε is the dielectric constant of silicon. From equation (1), we can see that for different doping N[sub]D[/sub] in the base region, when V[sub]G[/sub] is constant, the non-uniform doping N[sub]D[/sub] will make d different in different parts. The low N[sub]D[/sub] region corresponds to a narrow d, and this region will be turned on before other regions. As a result, the conduction current is localized, and the local concentration of current makes the current density very high, which may cause the aluminum electrode strip to burn out and cause the device to fail. Even with uniform Nd:D doping, the gate bias cannot be applied simultaneously to all gate regions during device turn-on. Far from the gate voltage point, turn-on is always delayed due to the RC delay effect. However, in reality, device failure primarily occurs near the source voltage point, not on the gate strip. This is mainly because a voltage drop is generated across the ohmic resistance R_M of the metal electrode when the source current flows through it. Due to the self-biasing effect of the metal electrode strip resistance, the source bias is unevenly distributed along the strip length, decreasing with distance from the strip root. This causes current concentration at the strip root, resulting in maximum current at the voltage point. (3) Physical analysis of dv/dt capacitance of BSIT dv/dt is the rate of rise of the critical blocking state voltage. During the turn-off process of a high-voltage, high-current BSIT, the device will withstand a large dv/dt, which is equivalent to applying a positive rising voltage between the drain and source of the BSIT. Due to the debiasing effect of the gate series resistor RG, an excessively large dv/dt will affect the turn-off of the BSIT, causing the device to fail to turn off or to turn back on after turn-off. Although an excessively large dv/dt will not damage the device, it will make the entire circuit unstable. Therefore, the device's tolerance must be increased. The dv/dt characteristics during the blocking process can be analyzed using the equivalent circuit shown in Figure 3. R[sub]G[/sub] is the series resistance between the gate and source, and C[sub]GD[/sub] is the equivalent capacitance between the drain and the gate. As shown in Figure 4. R[sub]L[/sub] is the current-limiting resistor. The reverse gate voltage V[sub]GS[/sub] is used to turn off the device. [align=center] Figure 3 Equivalent circuit diagram at turn-off moment[/align] [align=center] Figure 4 Equivalent schematic diagram of BSIT drain-gate junction capacitance[/align] During the turn-off process, when dv/dt is too large, the drain voltage forms a reverse current through the capacitor C[sub]GD[/sub], and when it flows through the gate-source resistor R[sub]GS[/sub], it forms a voltage opposite to V[sub]GS[/sub], weakening the turn-off effect of V[sub]GS[/sub] on the device, and sometimes causing the device to be mis-turned on. (4) Physical analysis of BSIT switching losses The power loss of BSIT includes the average power consumption P[sub]F[/sub] during conduction, the power loss P[sub]ON[/sub] during turn-on, the power loss P[sub]OFF[/sub] during turn-off, and the gate power consumption. In general, the gate power consumption accounts for a very small proportion of the total power consumption and can be ignored. The power loss during turn-on includes the loss of turn-on delay time and turn-on rise time; the turn-off loss is mainly the loss generated by the fall time and tail time. The power losses during turn-on and turn-off can be directly calculated from the switching waveforms, as shown in Figures 5 and 6. They increase with increasing turn-on and turn-off currents, respectively. [align=center] Figure 5 Turn-on loss of BSIT[/align] [align=center] Figure 6 Turn-off loss of BSIT[/align] The power loss of BSIT increases rapidly with increasing operating frequency. Furthermore, the proportion of losses in each component varies at different operating frequencies. At low frequencies, the average power consumption during conduction is greater than the turn-on and turn-off power losses. At very high operating frequencies, switching losses become dominant, meaning that turn-on and turn-off power consumption are much greater than on-state power consumption. Additionally, the magnitude of the gate drive current has a significant impact on switching losses. Increased forward drive current leads to longer storage time, slower turn-off speed, and increased switching losses at high frequencies. However, decreased forward drive current increases the dynamic saturation voltage drop, increasing on-state losses. Therefore, the design of the gate drive circuit directly affects the application of the device. 4. Conclusion The switching characteristics, di/dt capacity, dv/dt capacity, and switching losses of a BSIT are important dynamic parameters that indicate its dynamic performance. Physical analysis of these parameters allows for a deeper understanding of the dynamic performance and operating characteristics of BSITs, enabling the identification of methods to improve their dynamic performance, which has guiding significance for practical applications. References [1] BJBaliga, "The di/dt Capability of Field-Controlled Thyristors", Solid-state Electronics, Vol.25, No.7, P.583-588, (1982). [2] BJBaliga, "The dv/dt Capability of Field-Controlled Thyristors", IEEE Trans.Electron Devices, E D-30(6),P612-616,June(1983). [3] YMochida, J.Nishizawa, T.Ohmi and R.Gupta, Characteristics of Static Induction Transistor: Effects of Series Resistance, IEEE Trans. Electron Devices, VoLED-25,No.7, P761, 1978. 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