1. Introduction The dicing machine, a key piece of equipment in semiconductor post-packaging processes, is a device that performs dicing and processing of multiple chip patterns through high-speed spindle rotation, precise indexing and positioning in the y-axis, high-speed movement of the x-axis guide rail, and multi-angle rotation in the θ-axis. It can be used for dicing and wafering of special materials and brittle and hard materials such as silicon integrated circuits, SAW devices, Ga/As, lithium niobate, bismuth antimony, thick-film circuits, and indium phosphide. Given the requirements for detection speed and accuracy in precision dicing machine inspection systems, a high-resolution CCD camera is needed to quickly extract the dicing images. While PC-based hardware technology has been implemented, many factors still affect the practical use of dicing machines within the PC structure, such as potential mechanical failures of the hard drive, instability caused by fans, shock resistance, and interference resistance. These factors remain one of the problems restricting the application of IPCs (industrial PCs) in semiconductor equipment. Introducing an embedded hardware solution solves this problem and significantly reduces costs. The hardware part of the precision dicing machine based on an embedded hardware platform adopts a master-slave dual-CPU structure, with the master CPU being an ARM processor. The precision dicing machine control unit consists of three units: a monitoring and management unit, a four-axis motion control unit, and a dicing machine vision unit. The vision unit monitors the wafer dicing process by acquiring images in real time. The monitoring and management unit's main functions are monitoring equipment operation and setting processing parameters. The four-axis motion control unit uses a dedicated motion control chip to receive parameters from the S3c2510 and directly control the motor to complete motion control. The vision acquisition system is based on a PCI bus with a 32-bit data bus, a clock frequency of up to 66 MHz, and a maximum transmission rate of 264 MB/s, which meets the needs of the dicing machine vision system. The core board is designed with two additional PCI slots. Embedded devices require the development of PCI device drivers to integrate existing PCI devices into the embedded motherboard. The dicing machine's vision acquisition system consists of an optical illumination system, a CCD camera, image processing software, etc., as shown in Figure 1. 2. Hardware Circuit Design The hardware structure of the dicing image acquisition system was designed based on the bus topology of the PCI system. The camera, selected based on the vision requirements of the dicing machine, is a 350,000-pixel image acquisition module with a PCI interface. The system's main processor is a Samsung S3C2510. Considering the S3C2510's built-in PCI controller, the two extended PCI interfaces can be connected to the four-axis embedded motion control chip MCX314As and the image acquisition module, respectively. The system block diagram is shown in Figure 2. The chip uses an ARM 940T core, with a maximum operating frequency of 200 MHz, and integrates a series of interface controllers, including an SDRAM controller, PCI controller, USB controller, and 10M/100M Ethernet controller. To meet the real-time control requirements of a precision dicing machine, the motherboard's external clock source is 10 MHz. Using the S3C2510's four built-in frequency multipliers, pins CLKMOD0, CLKMOD1, CPU_FREQ1, and BUS_FREQ0 are set high; pins CPUFREQ0, CPU_FREQ2, BUS_FREQ1, and BUS_FREQ2 are set low, resulting in a system core operating frequency of 133 MHz, a PCI device operating frequency of 66 MHz, and a USB device operating frequency of 48 MHz. Figure 3 shows the S3C2510's PCI slot diagram. After system power-on, the image acquisition module in the PCI slot awaits analog signal input from the CCD camera. Once the image acquisition module receives the analog data, it encodes it. The processed data is then transmitted to the SDRAM via the S3C2510's internal AHB bus. The main control unit uses the video service program in the embedded Linux system on the motherboard to monitor the wafer dicing using a decoding player. The S3C2510 ARM processor's internal PCI (MINI-PCI) and PC Card controllers conform to the PCI bus specification version 2.2. The S3C2510's PCI (MINI-PCI) and PC Card controllers are configured in PCI Host mode (see Table 1). It features a 32-bit address/data multiplexed bus, supports non-linear and burst transfers, and achieves maximum data transfer speeds of 264 MB/s and 66 MHz (132 MB/s and 33 MHz). It also includes an address translation mechanism to map internal PCI bus addresses to memory or peripheral devices. The PCI bus clock frequency is set to 66 MHz in the design, thus enabling a maximum transfer speed of 264 MB/s on the motherboard, sufficient for fast data transfer. The system utilizes clock feedback to compensate for PCI clock latency. When the PCI controller operates in PCI HOST mode, its clock source is provided internally by the system. The S3C2510 has three PCI clock output signals: PCICLK1, PCICLK2, and PCILK3. Setting bit DC3 of the PCI device diagnostic register PCIDIAG0 to 1 disables PCICLK3 as an output. At this time, PCICLK1 and PCICLK3 are connected, and the clock signal is fed back to the processor core through PCICLK3. This ensures that external PCI devices are synchronized with the PCI clock, thus compensating for clock delays. The system and PCI controller startup sequence is shown in Figure 4. When configuring the special function registers of the PCI controller, interrupts must first be disabled by setting PCIINTEN=0. Then, the PCI control and status registers PCICON[ARB, ATS, SPL, IOP, MMP] are configured. In some cases, the PCI diagnostic register also needs to be configured; this register is for testing functions and does not need to be configured in PCMCIA Host mode. Then, the registers PCIBAM0~1 and PCI-BATPA0~2 related to the base address need to be designed. After setting them, the registers related to PCI restart and clock need to be configured. The key step is to set the PCI restart and clock register PCIRCC[MSK]=0, which is to prevent the restart signal and clock signal from conflicting. When the PCI controller detects peripheral devices and initializes the registers of peripheral devices, the following work needs to be done: (1) Read all configuration register values, including PCIHID, PCIHSC, PCIHSSID, etc.; (2) Check the range of BAR (Backup Address Register) and allocate space one by one; (3) Enable external devices and activate the bus. All the above configurations are completed in the driver of the PCI image acquisition module. Since the driver has been loaded into the ARM Linux kernel, the operating system will automatically configure the PCI external devices after the system starts. 3 ARM Linux Porting and Device Driver Implementation 3.1 Boot Loader Porting The Boot Loader is closely connected to the hardware. The system calls the operating system kernel and finally runs the operating system through the Boot Loader. This system uses U-Boot (Universal Boot Loader) as its core. U-Boot, the Boot Loader, is essentially a small Linux system. Its work involves hardware system initialization, memory allocation, etc. The following tasks were mainly completed during the design process, and the related program writing was based on the routines provided by U-Boot: (1) Modify the Makefile configuration file and add the compilation command line for the target board; (2) Create the arm940t directory under the CPU directory, which mainly includes the interrupt setting function code interrupts9c, the system entry function start.S, the CPU-related code file cpu.c, and the serial port initialization code related file serial.c, etc.; (3) Create the S3C2510 directory under the Board directory, which mainly includes the FLASH initialization code flash.c, the linker file u-boot.1ds, the memory allocation code memsetup.S, etc.; (4) Write the configuration file, namely: include/configs/s3c25l0.h, which defines the registers and other system configurations. Most of the work was done with reference to the S3C25l0 datasheet; (5) Write the flash.c file, based on the AMD NOR flash used. Flash is used to write the Flash driver, including the flash chip model, print information, capacity size, flash erase function, etc.; (6) Modify the size of SDRAM by modifying the value of #define PHYS_SDRAM_SIZE in the configuration file include/configs/s3c2510.h. Its size is determined according to the actual SDRAM size in the application; (7) Modify the serial port parameter file serial.C. The main thing is to set the serial port baud rate. The baud rate calculation formula is: RUBRDIVO=((int)(MCLK/16./(gd_>baudrate)+0.5)-1); (8) Modify the start.S file. An executable image must have an entry point and can only have one unique global entry point. Modify globl_start_start in start.S to place it at address 0x0 of Rom (flash). Compile U-Boot and download it to the target board for debugging through the Jtag port. 3.2 Writing ARM Linux Device Drivers The Linux kernel consists of device management, process management, file system and memory management. Linux device drivers can be divided into character devices, network interface devices, block devices and other non-standard drivers. PCI devices are considered character devices. Each PCI peripheral is identified by a bus number, a device number and a function number. There are three access spaces, namely I/O ports, memory space and configuration registers. The PCI configuration space consists of 256 bytes, and each device function has a configuration space, which is used to determine the working mode of the PCI device and the address mapped to the system. The main steps to add the system's PCI device driver are: (1) Create a PCI device, command: mknod pci_dev c247 0, where c represents a character device, 247 represents the major device number and 0 represents the minor device number. (2) Initialize external devices. Add the function pci_dev_init() to the chr_dev_init() function in the ARMlinux/linux/drivers/chal/mem.c file. chr_dev_init() will be called when the system starts and will complete the device driver initialization. (3) Write the device driver file pci__dev.c. The device registration interface function, interrupt handling function, etc. constitute the main code of the PCI device driver. That is, file_operationgs reads and writes data according to the base address given by the PCI configuration register of S3C2510. The I/O space defined by PCI is a 32-bit address space, and memory and I/O can use the same configuration interface. (4) Load the PCI device. ARM Linux does not support dynamic loading of device drivers, so the driver needs to be compiled into the ARM Linux kernel. First, modify the Makefile by adding the line: `obj_$(CONFIG_PCI_DEV) += pci_dev.o`. Then modify `config.in` by adding: `bool 'pci_dev install 'CONFIG_PCI_DEV'`. This line allows selection of the device when configuring the target board's Linux kernel. Finally, add the device node `pci_dev, C, 247, 0` to the target system's Makefile. This allows selection of `pci_dev install` during Linux kernel configuration, followed by compilation. The PCI device driver is then loaded into the ARM Linux system. 4. Main Control Unit Image Acquisition Programming The kernel provides a V4L function interface for video devices such as digital cameras. V4L provides basic I/O operations for video devices, such as `open`, `read`, `write`, `close`, interrupt handling, memory mapping, and I/O channel control (`ioctl`), defined in the `struct file_operations` data structure. When an application performs system calls such as open, read, write, and close on a device, the kernel accesses the function interfaces provided by the driver through the file_operation structure. The specific acquisition procedure is as follows: The PCI interface video acquisition process is shown in Figure 5. V4L provides two schemes for video image acquisition: ① read() direct reading, ② mmap() memory mapping. read() reads data through a memory buffer; while mmap() maps device memory into the user process's address space, bypassing the kernel buffer, thus accelerating I/O access. Furthermore, the mmap() system call uses inter-process sharing of memory by mapping the same file, allowing processes to access the file like ordinary memory. Access only requires a pointer and does not require calling file operation functions. Therefore, mmap() is used for image acquisition. The initialization functions (camera_pict_init, camera_mmap_init, camera_get_mbuf) and the image acquisition function (camera_grap-image) are described below: 5. Conclusion High-speed real-time image data processing and transmission are the foundation of automated dicing and a crucial guarantee of accuracy and efficiency. This embedded vision system based on the PCI bus for external device interconnection uses a high-performance ARM processor and embeds a configurable ARMLINUX operating system, enabling efficient completion of dicing requirements. The entire system boasts high reliability and strong scalability, avoiding the inconveniences of traditional industrial control computers such as viruses, patches, and system crashes.