In recent years, various switching power supplies have been increasingly widely used due to their compact size, high power density, and high efficiency. With the increasing automation of power systems, especially the microcomputerization of protection devices and the programmability of communication devices, the requirements for power supply size and efficiency are constantly increasing. Magnetic components and heat dissipation devices in power supplies have become significant obstacles to improving power density. Increasing the switching frequency can greatly reduce the size and weight of switching converters (especially transformers, inductors, and other magnetic components, as well as capacitors), thereby increasing the converter's power density. Furthermore, increasing the switching frequency can reduce the audio noise of the switching power supply and improve dynamic response. However, since the on/off control of the switching transistor is independent of the current flowing through it and the voltage applied across it, and early pulse-width modulation (PWM) switching power supplies operated in hard-switching mode, where the power switching transistor is forced to turn on or off under non-zero voltage or current conditions, the switching losses in the circuit are very high. The higher the switching frequency, the greater the losses, which not only increases the difficulty of thermal design but also significantly reduces the reliability of the system. This has greatly limited the high-frequency development of PWM switching technology. Based on the design requirements of high-frequency power supply, and combined with practical experience and experimental results, suitable switching devices were selected, and a stable, reliable, and high-performance control circuit, drive circuit, buffer circuit, and main magnetic components were designed. The working principle and system stability of the maximum current automatic current sharing method were studied in depth. A current sharing control circuit for the power supply was designed using the UC3907 current sharing control chip, enabling the module units to be connected in parallel, allowing multiple power supply modules to be connected in parallel to form a larger power supply system. 1. System Principle Design Concept When designing a large switching power supply module, an overall system plan is first needed to facilitate the design of the overall structure and corresponding auxiliary power supplies. The overall block diagram of the high-frequency switching DC power supply system is shown in Figure 1. 2. Control Main Circuit Design 2.1 Voltage and Current Dual-Loop Control To achieve controllable output voltage and current, current-mode control is usually adopted. Commonly used current-mode control methods include peak current control and average current control. However, peak current control suffers from several drawbacks, such as instability, susceptibility to subharmonic oscillations, sensitivity to noise, and poor noise immunity. Therefore, we adopted the average current control method (PWM). The average current mode employs dual closed-loop control. The inner loop controls the output filter inductor current, while the outer loop controls the output voltage, improving system response speed. The schematic diagram of average current mode PWM control is shown in Figure 2. The error voltage signal Ue is connected to the non-inverting input of the current error signal amplifier as the control signal Uip for output inductor current feedback. The output inductor current feedback signal Ui, with a sawtooth ripple component, is connected to the inverting input of the current error signal amplifier to track the current control signal Uip. The difference between Ui and Uip is amplified by the current error amplifier to obtain the average current tracking error signal UC. The PWM control signal is then obtained by comparing UC with the triangular sawtooth wave signal through a comparator. Since the waveform of UC is out of phase with the current waveform Ui, the control signal is generated by comparing the downslope of UC (corresponding to the conduction period of the switching device) with the upslope of the triangular wave. This obviously adds a certain amount of slope compensation. However, for stable operation, the downward slope of the inductor current must not exceed the slope of the crystal oscillator. 2.2 Small-Signal Analysis and Parameter Design of Current and Voltage Loop PI Regulators There are two operating modes for this control method: constant voltage and constant current. When D1 is on, the circuit operates in constant current mode. At this time, the voltage loop is inactive, and the circuit is equivalent to single-loop control. When D1 is off, the circuit operates in constant voltage mode. The circuit adopts cascaded dual-loop control, with the current loop serving as the inner loop of the voltage loop. The output Ue of the voltage loop PI regulator is used as the setpoint for the current loop PI regulator. Its circuit block diagram is shown in Figure 3. When designing parameters, the regulator for the current loop is designed first to obtain a stable inner loop. Then, the closed-loop transfer function Tic(s) of the current loop is obtained and used as a component of the voltage loop (as shown in Figure 4). Then, the regulator for the voltage loop is designed. The biggest advantage of this control method is that it effectively solves the current limiting problem of the circuit, giving the circuit the fastest current limiting response speed. Furthermore, the change in voltage drop across D1 can be reduced by adjusting resistor R3, thereby improving the current stabilization accuracy of this control method. H is the output voltage sampling coefficient, Ki is the inductor current sampling coefficient; FM is the transfer function of the pulse width modulator, FM=1/Upp, (Upp is the peak-to-peak value of the triangular wave); Figure 3 Circuit block diagram in dual-loop control mode Figure 4 Equivalent block diagram of voltage outer loop GV(s) is the transfer function of the voltage loop PI regulator: (1-1) Gi(s) is the transfer function of the current loop PI regulator: (1-2) Gdi(s) is the open-loop transfer function of the duty cycle of the main circuit on the inductor current (1-3) Ignore the influence of the equivalent resistance of the output filter inductor capacitor (1-4) Where: Udc is the input DC bus voltage; n is the turns ratio of the secondary side to the primary side L is the output filter inductor value; RL is the resistance of the filter inductor; C is the output filter capacitor; RC is the series equivalent resistance of the filter capacitor; R is the load resistance. Z(s) is the parallel impedance of the load and output capacitor branches: (1-5) From Figure 3, the closed-loop transfer function of the current loop (inner loop) is: (1-6) Then, from the equivalent block diagram Figure 4, the open-loop transfer function of the voltage loop before compensation is: (1-7) 3 Control Circuit Design An average current mode control circuit is constructed using an integrated chip UC3525 and an external operational amplifier. A finite bipolar control of four control signals is formed using a single UC3525 and an external logic circuit (as shown in Figure 5). 1) Outer loop control. The voltage setpoint signal and the output voltage feedback signal are compared and compensated by operational amplifier U1 to obtain Ue, which is connected to pin 2 of the internal error amplifier of UC3525 as the control signal Uip for the feedback current. When the output current exceeds the given current limit, D11 conducts, and Uip is embedded at the given current limit. 2) Inner loop control. The sampling resistor detects the output current and obtains the current feedback signal through a current sensing amplifier. Pin 1 of the internal error amplifier of UC3525 is connected to the inverting input terminal and compared with Uip. Pin 9 of UC3525 is the feedback compensation terminal. 3) Finite bipolar control. Pin 4 of UC3525 is the synchronous signal output, which serves as the clock signal for D flip-flop U3. The Q terminal (pin 1) and Q12 terminal (pin 2) of U3 can obtain two sets of pulses with a duty cycle of 50% and a phase difference of 180°. Q11 and Q12 are used to control the dead time. Figure 5 Schematic diagram of finite bipolar control constructed by a single UC3525 4 Drive circuit design In the use of IGBTs, the rationality of the selection and correctness of the drive circuit design are among the issues affecting their widespread use. The on-state voltage, switching time, switching loss, short-circuit withstand capability, and dv/dt current of IGBTs are all closely related to the gate drive conditions. The schematic diagram of the IGBT drive circuit is shown in Figure 6. In the diagram, Q1 is the drive signal input generated by the control circuit, and fault is the fault detection signal issued by the drive circuit when it detects faults such as overcurrent. C1, G1, and E1 are connected to the source, gate, and drain terminals of the IGBT, respectively. The drive circuit is powered by a single power supply plus a Zener diode. For the M57962AL drive circuit, the drive circuit is prone to losing negative bias voltage in the following two situations: first, the Zener diode D2 that generates negative bias voltage is short-circuited; second, when the drive circuit is powered by a single power supply, it loses the power supply voltage. At this time, if the typical connection of the traditional M57962AL single power supply is followed (as shown in Figure 7), no protection signal is given, which can easily cause damage to the IGBT. Figure 6 shows the schematic diagram of the IGBT drive circuit. In response to the above situations, some improvements have been made to the peripheral circuit of the M57962AL (as shown in Figure 7). Under normal circumstances, D4 is turned on, pin 8 of the M57962AL is at a high level, D1 is turned off, VT ​​is turned on, the optocoupler output is in a low impedance state, the fault signal is at a low level, and it appears as if there is no fault. During overcurrent protection, D4 is cut off, pin 8 of M57962AL is low, D1 is on, VT is off, the optocoupler output is in a high-impedance state, and the fault signal is high, indicating a fault has occurred. If the Zener diode D2 breaks down and short-circuits, D4 is off, VT ​​is off, the optocoupler output is in a high-impedance state, and a fault signal is also given. If the drive circuit loses +24V voltage, no current flows through the optocoupler, still indicating a fault protection. This avoids damage to the IGBT due to loss of negative bias or power supply. Figure 7 Typical connection of M57962AL 5 Conclusion Based on the technical requirements of high-frequency switching power supplies, the control circuit, drive circuit, buffer circuit, and main magnetic components of the switching power supply have been designed and optimized. With the continuous development of power electronics technology, high-frequency switching power supplies will inevitably be driven towards a larger scale.