A variable frequency power supply implemented using DDS technology

Abstract: This paper introduces a frequency converter power supply implemented using DDS technology. The method is simple and feasible, and easy to debug and maintain. It exhibits low harmonic content, high frequency accuracy, and continuous frequency adjustment. Keywords: DDS; frequency conversion; microcontroller Introduction Traditional frequency converter power supply implementation mainly includes rectification, inversion, and filtering, which are inconvenient in both design, debugging, and maintenance. This paper introduces a frequency converter power supply implemented using DDS technology. DDS chips are mostly ASICs, using hardware to implement their functions. They are mainly used in receiver local oscillators, signal generators, instruments, communication systems, and radar systems for signal generation. This paper proposes a method using microcontroller resources to generate signals in software and apply it to low-power measurement power supplies, thus obtaining a simple and feasible frequency converter power supply solution. Design Principle and Structure The basic structure diagram of DDS technology is shown. The frequency control word FC (Frequence Control) controls the frequency of the synthesized waveform. The clock source emits pulses at frequency fc. When a pulse arrives, the N-bit phase register PR (Phase Register) increases in steps FC. The result serves as the address for the lookup table (LUT). The LUT stores the digital amplitude information of a complete periodic waveform. Each LUT storage unit corresponds to a phase point within a period. The lookup table maps the input address information into the amplitude signal of the synthesized waveform, which is then input to the DAC. After passing through the DAC, the waveform to be synthesized can be obtained. FC is actually the phase increment of the waveform during each clock cycle; controlling FC controls the frequency of the output waveform. PR returns to its initial state after every 2N/M clock cycles, and the corresponding DAC also outputs a waveform. The period of the output waveform is T = (2N/FC)Tc, and the frequency is f = (FC/2N)fc. The minimum resolution of the DDS is fr = fc/2N. This design utilizes microcontroller software to implement the DDS, and the overall design framework is shown in Figure 2. The amplitude data of a sine wave for one period is generated and stored in the microcontroller's ROM as a LUT. The microcontroller controls the clock to output the data of each phase point sequentially through the I/O port. Adjusting the clock interval and phase between every two sampling points controls the duration of each period, thus achieving frequency adjustability. The microcontroller's I/O port outputs a digital signal. Connecting this signal to a DAC synthesizes a sine wave, thus reconstructing the sine signal. Passing the obtained sine wave (more accurately, a stepped wave) through a filter yields a high-quality sine wave with high frequency accuracy. This signal is still weak; passing it through a power amplifier module produces a frequency-adjustable sine wave. Example Introduction : The following uses a designed variable frequency grounding resistance measuring instrument power supply as an example to illustrate the entire method. This power supply requires an output wave frequency adjustable from 25 to 100 Hz, a frequency resolution of 1 Hz, and an output power between 100 and 1000 W. The frequency of the synthesized sine wave is f = (FC/2N)fc. It can be seen that adjusting the phase increment FC/2N or the clock frequency fc can achieve the purpose of adjusting the output waveform frequency. Generally, DDS technology uses a fixed fc and adjustable phase increment method. This is because the phase increment is uniformly adjustable, resulting in a high frequency resolution waveform. By increasing the value of N, the frequency resolution can be increased infinitely, thus the generated sine wave frequency is continuously adjustable and has high frequency resolution. The frequency response (fc) is generally obtained by dividing the fundamental frequency. Adjusting the division factor cannot continuously adjust fc; the resulting frequencies are discretely and unevenly distributed across the frequency space. For example, with a fundamental frequency of 62.5 kHz, to generate a 6 kHz fc, a division factor of 10 or 11 would yield fc of 6250 Hz or 5681 Hz. This method has a frequency resolution of fr = fc/N(N+1). When N changes from 10 to 11, fr = 568 Hz; when N changes from 1000 to 1001, fr = 0.0624 Hz. Frequency continuity is poor in the high-frequency range but relatively good in the low-frequency range. However, by observing the method of fixing fc and adjusting the phase increment, it is found that its resolution is fr = fc/2N. To increase the resolution, the value of N must be increased, requiring a LUT with a capacity of 2N, occupying a large amount of storage space. A solution is to use a PR data width larger than the LUT address width, but this inevitably introduces phase truncation errors. In this design, due to the low frequency of the synthesized sine wave, a fixed phase increment is used to adjust the clock frequency fc. The clock signal is generated by an interrupt, using a timer interrupt as the interrupt source. The actual operating fc is obtained by dividing the microcontroller's clock frequency. The microcontroller's timer counting frequency is as high as 1MHz, resulting in extremely high frequency resolution. Adjusting fc is also simple; the interrupt interval is adjusted by changing the timer value, thus achieving the purpose of adjusting fc. The flow of the microcontroller interrupt program is shown in Figure 4. In the design, an average of 64 phase points are taken for each sine wave cycle, with each point using 8-bit precision. A common 51 microcontroller is used, a 12MHz crystal oscillator is selected, and an 8-bit DAC0832 is chosen. In the circuit, the microcontroller outputs the synthesized sine wave amplitude data sequentially from port P1. After bipolar D/A conversion and filtering by a third-order Butterworth filter, a frequency-adjustable sine wave signal is obtained. Through experiments, sine waves at frequencies of 25Hz, 50Hz, and 100Hz were obtained. The waveforms were good, with a frequency error of no more than 0.1%. After filtering, the harmonic components of the resulting sine waves were less than 1%, generally meeting the requirements. Conclusion In general, this method for realizing a frequency converter is simple and feasible, easy to debug and maintain, and produces ideal waveforms with low harmonic content, high frequency accuracy, and continuous frequency adjustment. However, this method also has a significant limitation: it is limited by the amplification of the power amplifier module. The output power is relatively small, making it more suitable for applications with low power requirements, such as frequency converters for measuring instruments and intelligent instruments. References 1 Huang Jun, Wang Zhaoan. Power Electronic Converter Technology. Machinery Industry Press, 1993 2 Lu Hong. Electrical Drive. Development of a New Type of Current Tracking SPWM Inverter. 1993 3 Duan Xuewei, Liu Nianbao. Application of Direct Digital Synthesis Technology. Shanghai Aerospace Press, 1996