Traditional switching power supplies are like nonlinear loads on AC power grids. Their input terminals typically use bridge rectifiers and large-capacity filter capacitors. The peak charging effect generates high-order harmonic currents that radiate outwards through transmission lines, polluting the power grid. Power factor correction (PFC) is a significant area of ​​advancement in power supply technology over the past decade. Its basic principle is to take measures in the circuit to make the power input current sinusoidal and in phase with the input voltage. Sinusoidalization means eliminating harmonics, and having the two waveforms in phase achieves the goal of a power factor (PF) of 1. This paper designs a power factor corrector with an output voltage of 400V and an output power of 1000W based on the UC3854 power factor correction chip. The design method and working principle of the prototype are discussed. An analysis of the input current harmonic distortion problem is also given. Experimental results show that the designed prototype operates reliably and its performance basically meets the design specifications. I. Working Principle Figure 1 shows the circuit diagram of the designed Boost power factor corrector controlled by average current. [img=580,435]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490001.jpg[/img] [img=120,119]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490002.jpg[/img] The output voltage ui of the rectifier bridge in the main circuit is the absolute value of a sine wave. A similar current waveform flows through R5 and is applied to the B input terminal of the multiplier. The output current of the multiplier is [img=556,136]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490003.jpg[/img] When the input voltage is constant, A and C are constants, and the waveform of imo is similar to that of B. When the values ​​of A and C change slowly, it does not affect the waveform of imo. The voltage drop across R2 is UR2 = imoR2 = Upref. Upref is both the reference voltage of the waveform control loop and the absolute value of the waveform. The sampling circuit for the input current i is a small resistor R1, and the sampling voltage is Uis = iR1. The error voltage obtained by comparing the sampled voltage with the reference voltage [img=580,62]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490004.jpg[/img] When the total voltage gain of both the waveform error amplifier and the main circuit is large enough, the error voltage ΔUE is extremely small and can be ignored. Therefore, [img=580,123]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490005.jpg[/img] It can be seen that the waveform of the input current i is similar to the waveform of the multiplier output current imo. When the PWM signal wave is high, the switching transistor is turned on. When the input inductor current increases to a level greater than [img=120,119]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490006.jpg[/img], the PWM signal wave becomes low, the switching transistor is turned off, and the duty cycle is controlled, thereby adjusting the input current to follow the input voltage waveform. To further improve output voltage regulation and dynamic response speed, a voltage feedforward exponentiation function is added. As shown in the figure, the value at the C terminal of the multiplier is proportional to U², i.e., C∝U², while B is proportional to U, i.e., B∝U. Therefore, the value of [img=479,110]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490007.jpg[/img] increases as the input voltage decreases, thus the input power [img=329,107]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490008.jpg[/img] remains constant. That is, the input power can remain constant. 2. Analysis and Design 2.1 Inductor Selection For the UC3854 with average current control, the boost stage can be moved between continuous and intermittent operating modes without changing its performance. The inductor value is selected based on the peak current at the top of half a sine wave at low input voltage, or based on the duty cycle of the input voltage and switching frequency at that point. The relationship is as follows: [img=580,300]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490009.jpg[/img] In this experiment, L=0.45mH. Due to the characteristics of low permeability, high linearity, large saturation magnetic flux density, and wide operating frequency range of iron powder core material, it is widely used in the design of power factor correction inductors. In this design, iron powder core material with high cost performance is selected for the inductor, with 16 turns on the primary side and 4 turns on the secondary side. 2.2 Analysis of Input Current Harmonic Distortion The following is a theoretical analysis of the causes of input current distortion: The current reference signal imo is [img=580,130]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490010.jpg[/img] where iac is the input current of the multiplier, Kd is the proportional coefficient of the divider, Uvea is the output voltage of the voltage error amplifier, Kg is the proportional coefficient of the squarer, and Uff is the feedforward voltage. Analysis of the Boost power factor corrector control principle shows that the waveform of the input current mainly depends on the waveform (fundamental wave) of the current reference signal. Therefore, analyzing the harmonic distortion of the input current can be transformed into analyzing the harmonics of imo. In fact, since Uin is a "bun" wave voltage containing a second harmonic (accounting for 66% of the fundamental wave), the voltage ripple (low frequency) in Uff and Uvea are both second harmonics at twice the grid frequency. If we assume that the amplitude of the second harmonic content in Uvea and Uff is 1% on average, that is, Uvea and Uff are represented as [img=580,970]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490011.jpg[/img], the above formula shows that: if the output voltage error amplifier contains 1% second harmonic, then 0.5% third harmonic current will be generated in the current reference signal; if the feedforward voltage contains 1% second harmonic voltage, then 1% third harmonic current component will be generated in the current reference signal. 2.3 Voltage Control Loop The voltage control loop consists of a voltage error amplifier and a boost stage. Its function is to ensure the stability of the output voltage. Its structure is shown in Figure 2. [img=580,1141]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490012.jpg[/img] 2.4 Current Control Loop The current control loop consists of a current error amplifier, a PWM comparator, and a power stage. It forces the input current to track the input voltage by adjusting the duty cycle of the switching transistors. Its control system structure is shown in Figure 4. The transfer function of the current control loop is: [img=580,231]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490013.jpg[/img] The transfer function of the power stage is: [img=580,272]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490014.jpg[/img] The structure diagram of the current error amplifier is shown in Figure 5: [img=580,560]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490015.jpg[/img] Its transfer function is: [img=580,182]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490016.jpg[/img] 2.5 Solution to the problem of output voltage drift under light load In this experiment, the following phenomenon occurred: under light load or no load, the output voltage of the converter slowly drifted. The basic reason for this phenomenon is the input voltage offset of the current operational amplifier. The simplest solution is to connect a large resistor in parallel between pins 3 and 4 of the current amplifier, that is, to add a little DC feedback, and send a little of the positive level of the output to the inverting input terminal to compensate for the offset. However, this simple method also has drawbacks: The current operational amplifier (op-amp) normally requires positive level compensation under light loads but not under heavy loads. However, the DC feedback bias results in a higher op-amp output with heavier loads, thus requiring more compensation. Excessive feedback limits the high-level amplitude of the op-amp's output, thereby limiting the maximum output pulse width of the PWM modulator. This affects the input voltage regulation capability of the entire PFC circuit; that is, when the input AC voltage is low and the load is heavy, the output voltage may not reach the rated value. A better solution is to add an additional bias to the op-amp, as shown in Figure 6. In the figure, R1 is a megaohm resistor, and R2 can be adjusted appropriately. A fixed bias is added to pin 4 of the inverting input using a voltage divider circuit, thus solving the aforementioned drawbacks of the feedback bias. [img=580,475]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490017.jpg[/img] 3. Experimental Results A prototype was designed with an input voltage ranging from 80V to 270V, an output voltage of 400V, and a maximum output power of 1000W. The main circuit boost inductor was 0.45mH, the current sensing resistor was 0.05Ω, and the output capacitor was 470μF. Figure 7 shows the waveforms of the input voltage and current. Figure 8 shows the inductor-side voltage waveform. Figure 9 shows the output voltage waveform. Figure 10 shows the switching transistor drive signal waveform. [img=580,439]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490018.jpg[/img][img=580,1115]http://cms.cn50hz.com/files/RemoteFiles/20090204/874490019.jpg[/img] 4 Conclusion Experimental results show that the power factor corrector based on UC3854 designed in this paper meets the design requirements in terms of performance indicators, and the control circuit design is significantly simplified. Based on the chip's excellent control capabilities and extremely low price, this provides a feasible technical approach for improving the power factor and suppressing harmonic pollution in small and medium power switching power supplies.