Introduction In three-phase signal processing applications in power systems, it is often necessary to simultaneously acquire and process the voltage and current signals of phases A, B, and C. Examples include three-phase power, energy measurement, and harmonic analysis. The AD7656 from Analog Devices (ADI) is a 16-bit, 6-channel simultaneous sampling analog-to-digital converter (ADC). It contains six 16-bit A/D converters and features high conversion accuracy, high speed, low power consumption, large input analog signal amplitude, and high signal-to-noise ratio. The LPC2210 from Phmps is an industrial-grade ARM controller with fast processing speed and stable performance. Together with the AD7656, a 6-channel data acquisition system can significantly improve the system's signal acquisition and processing capabilities. 1. Features and Working Principle of AD7656 1.1 Features of AD7656 Figure 1 shows the internal functional block diagram of the AD7656. [img=580,577]http://cms.cn50hz.com/files/RemoteFiles/20090204/640740001.jpg[/img] Its main characteristics are:

[*] Six independent 16-bit ADC channels. [*] Input analog signal range: ±(10–15 V). [*] Maximum slew rate: 250 ksps. [*] Low power consumption: 140 mW at 250 ksps with 5 V supply. [*] On-chip 2.5 V reference voltage and reference buffer. [*] 8/16-bit parallel interface mode and serial interface mode.

1.2 Working Principle The AD7656 is a 6-channel 16-bit successive approximation ADC with two interface modes: serial interface mode and high-speed parallel interface mode. The parallel interface mode is further divided into 8-bit and 16-bit transmission methods. During data conversion, three conversion signals CONVST/B/C are used to control the simultaneous sampling of each pair, four, or six ADCs. If the three CONVST pins are connected together, six ADCs can be sampled simultaneously. On the rising edge of CONVST, the selected ADC pair is set to hold mode, and the conversion begins. After the rising edge of CONVST, the BUSY signal goes high to indicate that the conversion is in progress. The conversion time is 3μs. The BUSY signal returns to low to indicate that the conversion is complete. On the falling edge of the BUSY signal, the ADC returns to tracking mode, and the data can be read from the output register through the parallel or serial interface. When reading data from the 16-bit parallel interface, CS is first set low. Each time the read signal (RD) goes low, one channel of data is read from the 16-bit bus. For 6 channels of A/D data, 6 reads are required. The internal timing diagram for switching between 16-bit parallel interface modes is shown in Figure 2. [img=580,261]http://cms.cn50hz.com/files/RemoteFiles/20090204/640740002.jpg[/img] 2 Hardware Design Figure 3 shows the interface design between AD7656 and LPC2210. In applications involving three-phase AC signal processing, the Philips ARM controller LPC2210 is selected, which features low power consumption, high performance, and high speed. P0.22 of the LPC2210 is connected to CONVSTX to initiate simultaneous conversion of the 6 A/D channels. P0.23 is connected to the RESET signal to control the reset of the AD7656. The EINT1 signal is connected to the BUSY signal. After the AD7656 completes the conversion, the BUSY signal goes low, requesting an interrupt from the LPC2210. The LPC2210's chip select signal CS1 and read signal OE are connected to the A/D converter's chip select signal CS and read signal RD, respectively, to read the conversion result. Their address range is 0x81000000H to 0x81FFFFFFH. The 16-bit data bus of the LPC2210 is connected to the 16-bit data bus of the AD7656. Since the LPC2210 uses a 3.3V interface while the AD7656 uses 5V, a 100Ω resistor is connected in series for level matching. The LPC2210 also includes an LCD, keyboard, and RS232 interface circuitry for human-machine interface and uploading calculation results. [img=580,267]http://cms.cn50hz.com/files/RemoteFiles/20090204/640740003.jpg[/img] Before the AD7656 converts analog signals to digital signals, the analog signals need to be signal conditioned to a level suitable for the AD7656's analog signal input requirements. When connecting the AD7656 to external circuits, a decoupling circuit must be added to the DVCC, AVCC, VDRIVE, REFIN/OUT, and VSS pins. This decoupling circuit consists of a 10μF capacitor and a 100nF capacitor. The decoupling capacitor should be placed as close to the device as possible for better decoupling. In addition to the interfaces mentioned above, the connections for other key pins of the AD7656 are as follows: STBY connected to VDRIVE to select normal mode; RANGE grounded to select the input range ±10V; H/S SEL grounded to select hardware configuration; SER/PAR grounded to select the parallel interface; W/B grounded to indicate 16-bit parallel output; WR/REFEN/DIS connected to VDRIVE to select the internal reference. In specific circuit board design, digital ground and analog ground should be separated and connected together near the power input circuit. No digital signals should pass under the AD7656 chip to reduce interference and improve measurement accuracy. 3. Software Design The interface design is used for multi-channel data acquisition. The data reading and processing process of the LPC2210 is shown in Figure 4. Data acquisition for three-phase AC power requires sampling 128 points per cycle, i.e., 128 points every 20 ms, or once every 156.25 μs. Timer 0 is used to set the timer. When the timer expires, the A/D conversion starts. If the CONVSTA/B/C signals are linked together, the six channels of analog signals start converting simultaneously. After 3μs, all six channels of data are converted, and the BUSY signal goes low, generating an interrupt that notifies the ARM to read the data. The LPC2210 sends a low level to the chip select signal CS and the read signal RD to start reading the conversion results. After reading all six channels of data, the interrupt is exited, and the system waits for the next timer to expire before starting the next conversion. After 128 data conversions are completed, the timer is paused, and calculation begins. After the calculation is completed, the timer is restarted to complete the next cycle of 128 data acquisitions. [img=580,491]http://cms.cn50hz.com/files/RemoteFiles/20090204/640740004.jpg[/img]　Conclusion This paper introduces a novel analog-to-digital converter chip, AD7656, which can simultaneously acquire six signals. Furthermore, its interface circuit with LPC2210 is simple and easy to control, making it suitable for application in three-phase AC power data acquisition systems.