Frequency hopping communication technology is an anti-interference communication technology that has been widely used in recent years. One of the core technologies of frequency hopping communication is frequency synthesis. There are three main methods of frequency synthesis: direct synthesis, phase-locked loop (PLL) frequency synthesis, and direct digital synthesis (DDS). Direct digital synthesis (DDS) differs significantly from the other two methods. It directly samples and digitizes a reference sinusoidal clock, and then performs frequency synthesis through digital computation. Compared with other frequency synthesis methods, its advantages include: phase continuity, high frequency resolution, and fast frequency conversion speed. It also boasts low cost and good remodulation performance. Since frequency hopping synthesizers require fast frequency conversion speed, a wide output frequency range, and ease of use, high-speed DDS is well-suited for use as a frequency hopping synthesizer. [img=160,123]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-3/10-1.jpg[/img] [b]1. Principle and Characteristics of DDS[/b] As shown in Figure 1, a DDS consists of a phase accumulator, a sine lookup table, a D/A converter, and a low-pass filter. The reference clock in Figure 1 is a stable crystal oscillator used to synchronize all components of the synthesizer. The phase accumulator is similar to a simple counter; with each clock pulse input, its output increases by a phase increment value of one step. The phase accumulator converts the data of the frequency control word (FSW) into phase samples to determine the output frequency. The magnitude of the phase increment varies depending on the external instruction FSW; once the phase increment is given, the output frequency is determined. When addressed with such data, the sine lookup table converts the sampled values ​​stored in the phase accumulator into a digital function of the sine wave amplitude. The D/A converter converts digital signals into analog signals, and the low-pass filter further smooths and filters out out-of-band spurious signals to obtain the desired signal waveform. The relationship between the output frequency fO of the DDS and the reference clock fr, the phase accumulator length N, and the frequency control word FSW is: fO = fr·FSW/2N. The frequency resolution of the DDS is: ΔfO = fr/2N. Since the maximum output frequency of the DDS is limited by the Nyquist sampling theorem, fmax = fr/2. Currently, DDS products include Qualcomm's Q2334 and Q2368; and Analog Devices' AD7008, AD9850, and AD9851. This article mainly introduces Analog Devices' AD9851. [b]2. Working Principle and Characteristics of AD9851[/b] The AD9851 is Analog Devices' latest direct digital synthesizer manufactured using advanced CMOS technology. Its principle is shown in Figure 2. [img=180,128]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-3/10-2.jpg[/img][align=left] The AD9851 has a maximum operating clock of 180MHz. In addition to a complete high-speed DDS, it integrates a clock 6 multiplier and a high-speed comparator. The integrated clock 6 multiplier reduces the external reference clock frequency, requiring only a 30MHz crystal oscillator. This reduces high-frequency radiation and improves the system's electromagnetic compatibility. The AD9851 DDS system uses a 32-bit phase accumulator and a 10-bit DAC. At 70MHz analog output, the DAC output's suppression of parasitic dynamic range (SFDR) > 43dB. 5-bit phase control can achieve a minimum phase change of 11.5°. Frequency control and phase adjustment can be performed in parallel or serial modes. The AD9851 has a wide operating voltage range of 2.7 to 5.2V, and its power consumption is low at 180MHz (550mW) and only 4mW at 2.7V. The AD9851 uses a 28-pin surface mount package. 3. Application of AD9851 in Frequency Hopping Communication [/align][img=335,96]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-3/10-3.jpg[/img] 3.1 Working Principle of Frequency Hopping Communication Frequency hopping communication was first used in military anti-jamming communication and is now widely used in mobile communication, satellite communication, and other fields. Frequency hopping communication transmits information by rapidly and pseudo-randomly hopping the carrier frequency of the transmitted signal across a wide frequency band, thus possessing strong anti-jamming capabilities. The block diagram of the working principle of a frequency hopping system is shown in Figure 3. Frequency-hopping communication systems typically use FSK for data modulation. Narrowband information modulated by FSK is mixed with a wideband frequency-hopping local oscillator signal generated by a frequency synthesizer under pseudo-random code control to obtain a frequency-hopping modulated signal, which is then amplified and transmitted by the antenna. At the receiving end, the frequency-hopping signal is received by controlling the pseudo-random code generator through a synchronization circuit to make the frequency synthesizer generate a frequency-hopping local oscillator with the same frequency-hopping pattern as the transmitting end, thus obtaining the intermediate frequency (IF) signal. The IF signal is then demodulated and output as transmitted data. 3.2 Application of AD9851 in Frequency-Hopping Communication Due to its fast frequency conversion speed, wide output bandwidth, and ease of use, the AD9851 is particularly suitable as a frequency synthesizer in frequency-hopping communication. Figure 4 shows the application of the AD9851 in a frequency-hopping communication system. [img=345,116]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-3/10-4.jpg[/img] In Figure 4, at the frequency-hopping communication transmitter, the transmitted data and the frequency control signal generated by the pseudo-random code generator are added to form the frequency control word for the AD9851. The AD9851 outputs a wideband frequency-hopping signal and mixes it with the local oscillator signal to obtain a frequency-hopping radio frequency signal, which is then amplified and output to the antenna for transmission. At the receiver, the frequency-hopping signal is down-converted and mixed with the frequency-hopping signal generated by the AD9851 to obtain an intermediate frequency signal, which is then demodulated by the data demodulator to output data. The receiver's synchronization control circuit generates a frequency-hopping control signal synchronized with the transmitter to control the AD9851, causing it to generate a frequency-hopping signal. The demodulation circuit completes the demodulation and output of the frequency-hopping data. [b]4. Conclusion[/b] DDS chips have the advantages of short frequency switching time and wide frequency output, which are essential for frequency hopping systems. Applying DDS to frequency hopping communication systems simplifies the system structure, reduces cost, and makes implementation easier. This is highly advantageous for realizing small, lightweight, and high-performance frequency hopping communication systems. η = (28 - VF) / 28 = 2.5%, VR5 = 2.5 × 2.5% = 0.1V, therefore IR5 = VR5 / R5 = 0.1 / 10k = 10μA, R37 = (2.5 - VR5) / 10 = 2.4 / 10 - R36 = 240 - R36 = 130kΩ, and the regulation rate can be obtained from VF = 27.3V. [img=280,166]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-3/10-5.jpg[/img][align=left] [b]5. Automatic Switching Principle[/b] The automatic switching principle diagram is shown in Figure 5. Under normal power supply conditions, 24V DC power is generated by the VICOR module VI-26L-CU and output through D9. At this time, G6 is turned on, causing the relay coil JC1 to be de-energized. The normally open contact does not close, and the battery does not supply power, maintaining the charging state. Once the AC power supply is abnormal (power outage, too high or too low), D8 is cut off. Capacitors C44 and C45 discharge, causing JC1 to close, J1 is turned on, and the battery power supply state is switched. When the battery voltage is lower than VT (i.e., in a low-charge state), the UC2906 outputs a high level, turning on G6, de-energizing JC1, and disconnecting J1, thus terminating the battery's power supply. During or after battery power supply, if AC power returns to normal, the circuit automatically resumes AC power supply operation. The backup power supply control system described in this article has been proven through long-term operation in GY-II type direct-discharge power supplies to be highly reliable, flexible in switching, and capable of extending battery life by an average of approximately 70%, making it worthy of widespread adoption.