AD7237A Interface Design

1. Introduction The AD7237A is an LC2MOS dual-channel 12-bit digital-to-analog converter (DAC) from Analog Devices (AD). It features high speed, low power consumption, and a wide operating voltage range, making it widely used in industry. This article briefly introduces the basic structure and pin functions of the AD7237A. Then, it elaborates on its application in computer interface expansion card design. [b]2. Basic Structure and Pin Functions of the AD7237A[/b] The AD7237A is a fully dual-channel 12-bit voltage-output DAC with an output amplifier and a built-in reference voltage source. It has the following main features: ● High speed: Typical data setup time is 30ns; ● Low power consumption: Typical power consumption is 165mW in unipolar output mode; ● Operating voltage: 12～15V; ● (8+4) bit data latch structure. The AD7237A is an improved version of the industrial-grade AD7237. The main differences are: the AD7237A has a wider operating voltage range (12V to 15V), faster conversion speed, and better immunity to VDD voltage interference (VDD fluctuation range is ±10%). Figure 1 shows the basic block diagram of the AD7237A. The AD7237A mainly consists of four parts: a reference voltage source, control logic circuitry, an A-channel digital-to-analog converter (DAC), and a B-channel DAC. An integrated reference voltage source is provided for user use. When the operating power supply voltage reaches 12V, even if the operating power supply voltage fluctuates by ±10%, a standard 5V power supply will still be output at pin 2 (REF OUT). The control logic circuitry has five control signals: CS, WR, A1, A0, and LDAC, used to control the AD7237A to perform various functions. The A-channel DAC consists of a reference voltage input circuit, two-stage data latches, a resistor network, and an output amplifier. The B-channel DAC is exactly the same as the A-channel DAC. The pin functions of the AD7237A are listed in Table 1. [img=275,204]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-2/4.files/000204t1.jpg[/img][img=230,278]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-2/4.files/000204b1.jpg[/img] [b]3. Application of AD7237A in Computer Expansion Card Design[/b] Due to its fast conversion speed (30ns), low power consumption, high accuracy, and dual-channel characteristics, the AD7237A is widely used in industrial design. Based on these characteristics and other specific requirements of the AD7237A, the author attempted to apply it to a computer expansion card circuit, achieving excellent results. Figure 2 is the circuit diagram of the digital-to-analog conversion section of the interface expansion card, which inserts into an ISA slot (also known as an AT slot). In Figure 2, the chip select signal CS and data storage signal LDAC of the AD7237A come from the output pins F0 and F1 of the GAL16V8. Since only addresses 0X0000-0X03FF are available for I/O ports on the computer motherboard, only A2-A9 need to be input to the GAL16V8, while A0 and A1 are directly input to the AD7237A. Other input signals of the AD7237A, such as data lines DB0-DB7, write signal WR, power supply VDD, VSS, and ground lines DGND and AGND, all come from the computer motherboard. Because both A and B channels are required to be bipolar outputs, pins REF INA, ROWSA, REF INB, and ROWSB are all connected to pin REF OUT. Then, VOUTA and VOUTB are sent to two operational amplifiers respectively, amplifying the voltage by two times to reach -10V to +10V. The follower in the diagram is designed to increase the output impedance. The normal operation of the circuit depends on correct timing. Figure 3 is the timing diagram of the GAL16V8. When A2 to A9 are active, G0 and G1 are delayed by td (3ns). [img=142,71]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-2/4.files/000204t3.jpg[/img] [/font][img=241,172]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-2/4.files/000204t4.jpg[/img] ●Write pulse width TWR≥100ns; ●Time from data valid to WR signal establishment TDSET>80ns; ●Time from data valid to WR signal hold TDHOLD>10ns; ●Latch LDAC pulse width TLOAD>100ns. [font=SimSun] [img=136,101]http://zszl.cepee.com/cepee_kjlw_pic/files/wx/gwdzyqj/2000-2/4.files/000204t5.jpg[/img] [/font][align=left] And in Figure 4, 16ns 10ns, 10ns 360ns, 3ns

# AD7237A | Interface | Design

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AD7237A Interface Design

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