Traditional mercury or alcohol thermometers for temperature measurement are time-consuming, inconvenient to read, and have limited functionality, failing to meet the demands of the digital age. This paper proposes a novel digital temperature measurement circuit design that integrates a temperature measurement circuit and a real-time calendar clock circuit. The temperature measurement circuit has a measurement range of -20℃ to 50℃, a resolution of 1℃, and a measurement time of less than 1 second. The circuit uses a Linear Technology LT1799 resistor-programmable oscillator to convert resistance value to frequency, and then compares and maps the measured temperature value with parameters pre-stored in ROM. The real-time calendar clock circuit can display seven clock signals: year, month, day, weekday, hour, minute, and second, which users can set or modify. The entire circuit was hardware-simulated using an Altera ACEX1K series FPGA, offering flexible design and ease of modification. 1 Temperature Measurement Principle Temperature monitoring is primarily achieved using a temperature sensor. The temperature sensor in this design is an NTC thermistor, i.e., a thermistor with a negative temperature coefficient, whose resistance (RT) decreases rapidly with increasing temperature (T). The expression for the resistance-temperature relationship is given by the formula, where A and B are two constants determined by the semiconductor material and processing technology, and B is the thermistor index. The MF58 high-precision temperature measuring thermistor with R25℃ of 100kΩ is selected in the design, and the thermistor index is 3650K. The LTC1799 is a resistor programmable oscillator [1] that can generate a square wave with a duty cycle of 50% and has the characteristics of temperature stability and power supply voltage stability. It is a low-power device, and only one component is needed in the external environment, namely the setting resistor and the bypass capacitor. The standard circuit of the LTC1799 is shown in Figure 1. The 0.1μF capacitor in the figure is connected between the power supply pin and the ground, which can minimize the power supply noise. The setting resistor is connected between the 1st and 3rd pins to control the output frequency. In this design, the thermistor is used instead of the setting resistor. The 4th pin is a tri-state frequency divider pin, which determines whether the main control clock is divided by 1, 10 or 100 before the output. In the design, this pin is grounded, that is, the output frequency division coefficient is 1. Pin 5 is the output pin. The relationship between the output frequency and the setting resistor is as follows: Since the resistance of the thermistor changes with temperature, the relationship between temperature and frequency can be established through LTC1799 to achieve temperature measurement. From equations (1) and (2), it can be seen that there are two nonlinear relationships in the circuit design: one is the nonlinear relationship between the resistance of the thermistor and temperature, and the other is the nonlinearity when the resistance is converted to the frequency. Nonlinear problems can be handled by mathematical methods, but the algorithm is cumbersome and requires a lot of hardware resources. Therefore, another method is used in the design, that is, the frequency-temperature data is pre-stored in ROM and the temperature is mapped by looking up a table. This avoids the influence of nonlinear problems and saves hardware resources. [align=center]Figure 1 LTC1799 standard circuit[/align][align=left] 2 Hardware circuit design Functionally, the hardware circuit is divided into two main parts: temperature measurement circuit and real-time calendar clock circuit. 2.1 Temperature Measurement Circuit 2.1.1 Frequency Measurement Circuit The frequency measurement circuit mainly adopts the frequency counting method. After the external crystal oscillator divides the frequency, it obtains the sampling reference signal count_en and the counting reset signal count_clr with a period of 2T through the gate control circuit. The counter is enabled during the positive half-cycle of the sampling reference signal, and the counting module starts to measure the frequency of the input signal. The measurement time is exactly T, and the sampled data result is latched at the falling edge of the sampling reference signal. If the counter measures the number of signal pulses as N within time T, the frequency of the measured signal is: FX = N/T. The counting reset signal is used to reset the counting module at the beginning of each measurement to clear the result of the previous measurement. The timing relationship between each signal is shown in Figure 2. [/align][align=center] Figure 2 Timing relationship between sampling control signals[/align] In addition, since there is no synchronous locking relationship between the measured frequency signal and the sampling control signal during the measurement process, an additional error of ±1 will be generated at the end of the counting, which is the quantization error mentioned in reference [2]. Therefore, the sampling time T and the number of bits of the counter must be reasonably selected. In this design, the measured frequency varies in the range of 10kHz to 300kHz. Within the temperature range to be measured, the resistance changes by a minimum of 0.5828kΩ for every 1℃ change in temperature. When T=20ms, R=100kΩ, and N=1000, the influence of the ±1 quantization error is almost negligible. 2.1.2 Data processing circuit Since there will inevitably be measurement errors in the frequency measurement circuit, these measurement data results must be processed. This design proposes a new approach to data processing, and its data processing flow is shown in Figure 3. As shown in the figure, the data result N' in the frequency measurement circuit is first stored by shifting through several registers, and then the data stored is compared using a comparator. After removing the maximum and minimum values, the remaining intermediate values ​​are added together, and finally the average value N is obtained through a divider. [align=center]Figure 3 Data processing flow diagram[/align] The advantages of using this processing method to process data are: (1) It effectively reduces the influence of measurement errors. The comparator can eliminate sudden accidental error data. According to the principle of compensation for random errors, for a finite number of measurements, the arithmetic mean of multiple measurements can be approximated as the best estimate of the true value. (2) It can dynamically reflect the changing trend of the measured signal. This method is suitable for many occasions with high requirements for real-time measurement. 2.1.3 Temperature mapping circuit The block diagram of the temperature mapping circuit is shown in Figure 4. As can be seen from Figure 4, the address counter and the temperature value counter are controlled by a finite state machine. State 1: Counter cleared; State 2: Counter counted; State 3: Counting result latched; State 4: Counter result output. Repeatedly executing the above four states can realize the real-time measurement control of temperature. [align=center]Figure 4 Block diagram of temperature mapping circuit[/align] Since the temperature measurement range is -20℃～50℃ and the resolution is only 1℃, only 70 data need to be stored in the ROM, and a 128×12-bit ROM can meet the requirements. Meanwhile, the ROM does not store integer values ​​such as 1℃, 2℃, 3℃, but rather values ​​at 1.5℃, 2.5℃, 3.5℃ [3]. This ensures both accuracy and rounding. Initially, the temperature counter stores the lowest temperature value of -20℃, and the address counter is cleared. When a CLK signal is received, both the address counter and the decimal counter are incremented by 1. Then, the standard pulse value at the corresponding address in the ROM is obtained and compared with the actual input sampling pulse value N. If it is less than the actual input value, the comparator outputs S=1, and the two counters continue counting; otherwise, the counters stop counting. At this time, the value of the temperature counter is the actual measured temperature value. In addition to the advantages mentioned above, using ROM for temperature mapping also makes the design flexible and universal. In this circuit, only the data stored in the ROM needs to be changed to be applicable to various types of temperature sensors. [align=center]Figure 5 Clock timing display block diagram[/align][align=center] Figure 6 Clock working mode[/align] 2.2 Real-time calendar clock circuit 2.2.1 Clock timing display The clock timing display function block diagram is shown in Figure 5. The functions of each main module are as follows: (1) A 1Hz SEC signal is generated by the external crystal oscillator frequency division and input to the frequency divider second counting circuit with a modulus of 60. When the counter counts to 60, the frequency divider second counting circuit that counts to 60 is incremented by 1, and the second counting circuit is also cleared to 0 and the second counting is restarted. (2) Except for the day counter, the functions of the minute counting, time counting, month counting, week counting, and year counting circuits are similar. (3) The day counter is divided into four cases: 29 days in February of a leap year; 28 days in February of a common year; 31 days in January, March, May, July, August, October, and December; and 30 days in other months. (4) The outputs of the seven counting circuits are DBS, DBM, DBH, DBD, DBW, DBN, and DBY. Only one of them will appear at a time. The ENB signal of the control output is derived from the scanning circuit signal S. (5) The scanning frequency of the scanning circuit must exceed the visual persistence frequency of the human eye of 24Hz in order to achieve the visual effect of lighting up a single seven-segment display while enjoying the simultaneous display of 13 [4]. (6) Since all data except the day of the week are represented by two decimal digits, the BIN code represented in binary is first changed to a two-digit BCD code, and then sent to the seven-segment display for display through the seven-segment decoding circuit. 2.2.2 Clock setting The clock timing and clock adjustment modes are switched by the external button K1. Its working mode consists of eight state variables as shown in Figure 6. In any case of the clock adjustment mode (i.e., except for the 111 timing state), the time is adjusted by the button K2. The operation of various adjustment methods is similar. Taking the synchronization control signal ECS for counting seconds as an example, its composition is as follows: ECS = (SEC & SC) | (ADJ & ~STATE[2] & ~STATE[1] & ~STATE[0]); where: SC=STATE[2]& STATE[1] & STATE[0]; ADJ=SEC & (~SC) & ~K2; (1) SC represents the normal timing state, SEC and SC are jointly responsible for the clock timing action, and STATE is the state variable. (2) In the clock adjustment second working mode (i.e. STATE is 000), the ADJ signal controlled by STATE and K2 is responsible for manually adjusting the second. This design is based on the topdown design idea, and reasonable module division is carried out. In the digital circuit design part, the hardware language Verilog and Quartus tool are used for simulation, synthesis, adaptation and download. Finally, the hardware is tested through Altera's FPGA to realize the design requirements. This circuit can be widely used in the field of temperature monitoring and control of household appliances and office automation equipment.　　References 1 LTC1799 Handbook. Linear, 2001 2 Lin Zhanjiang. Electronic Measurement Technology. Beijing: Electronic Industry Press, 2003 3 Cao Hui, Hu Jun, Huang Junnai. Design and Implementation of Digital Temperature Measurement Circuit. Journal of Microelectronics, 2001; (3) 4 Lu Yi, Lai Jie. VHDL and Digital Circuit Design. Beijing: Science Press, 2001 (Received: 2005-04-26) Editor: He Shiping