Since its inception, DSP has been widely used by designers due to its powerful functions and reasonable price. However, unlike FPGA devices, DSPs were not developed for field programming. Therefore, in products with embedded DSP devices, if performance upgrades are needed and program upgrades are required, the lack of field programmability often causes trouble for users. This article takes TI's 54 series DSP as an example and, through analysis of the DSP development process and in-depth research on the code generation mechanism, finds a method for field programming DSP devices. [b]1 Development of 54x DSP[/b] The CCS integrated development environment is a simulation compiler developed by TI for its entire series of DSPs, which can develop almost all types of DSP chips currently available from TI. In the CCS integrated development environment, the development of 54x DSP generally involves the following steps: program writing, program compilation, COFF file generation, simulation running, HEX file generation, program memory burning, and on-machine running, as shown in Figure 1. If the source program is correct, a COFF (common() object file format) file can be compiled and generated, with the suffix .out. This file can be used for hardware simulation running, but cannot be directly used as a program for burning. To write a program to the DSP's external program memory, a HEX file must first be generated from the .out file. Generating a HEX file requires using the dedicated generation program HEX500. In a WIN32 environment, execute the HEX500 *.cmd command to generate the necessary *.hex file. According to the options in the *.cmd command file, you can set the memory type, bit width, starting address, program entry address, boot mode, and hex file format, etc. Below is an example of a command file for booting an 8-bit serial EOPROM via serial port: 123.out /* Input filename */ -i /* INTEL format */ -map 123.mxp -o 123. hex /* Output filename */ -memwidth 8 /* 8-bit memory */ -romwidth 8 /* Output file in bytes */ -bcrotorg 0x0000 /* External memory start address */ -bootorg serial /* Serial port load */ -e_main /* Main program entry */ SECTI()NS {.text;boot } /* The entire program is used as a boot segment */ [b]2 HEX Files[/b] The CCS compiler and linker generate COFF object files. COFF object files are in binary format, which is beneficial for modular programming and more efficient program fragment and target system memory management. However, most programmers do not accept COFF files. The HEX converter can be used to convert it to the following five standard ASCII hexadecimal formats: ◇ASCII-HEX, supporting 16-bit addresses ◇Extended TeKtronix; ◇Intel MCS-86; ◇Motorola-s, supporting 16-bit, 24-bit, and 32-bit addresses; ◇TI Tagged, supporting 16-bit addresses. Using the previous example, the HEX file fragment generated by the command file is shown in Figure 2 (opened with UltraEdit-32). In the command file, different parameters can also be specified according to the specific application. For example, when using parallel memory as program memory, the boot load command should be changed to parallel. For specific parameter settings, see reference [1]. [b]3 Hardware Programming Interface[/b] For the convenience of simulation debugging, 54x DSP devices have a JTAG interface for simulation programming, and its pin definition is shown in Figure 3. Through the JTAG port, a communication connection can be established with the DSP, and the internal units of the DSP can be controlled through a specific program to make the DSP perform a predetermined operation. This is the hardware basis for the DSP to achieve field programmability, as shown in Figure 4. **4. Implementation Method of Field Programmable DSPs** Since DSP programs are generally stored in external memory, field programmability involves writing new programs into the memory via the DSP. Previously, because the writing voltage of memory was generally higher than its operating voltage, it could only be programmed using a programmer. With technological advancements, many E2PROMs and Flash memories can now be electrically erased and rewritten, with the erase/write voltage matching the operating voltage, thus allowing programming at the operating voltage. Field programming of a DSP requires a computer and a DSP emulator; the required software includes the CCS integrated development platform, UltraEdit-32 program, and a DSP field programming program. The specific steps are as follows: ① Compile the program in the CCS integrated development environment and run it successfully on the target board. ② Open the program memory window and store the entire program code as a data file (dat file) according to the program's start and end addresses. ③ Generate a hex file. ④ Open the hex file using UltraEdit-32 to find the program entry point, program length, and program start address. ⑤ Load the programming program into the system chip. ⑥ Fill the program entry point, program length, and program start address into the field programming program and compile it successfully. ⑦ Load the stored program code into the appropriate location in the data space (the storage location is user-defined). ⑧ Run the field programming program to write the code into the external program memory via the DSP. The above steps are only performed at the beginning of programming. Once programming begins, multiple devices can be field-programmed continuously. Writing a DSP field programming program is also very simple. The following reference program is written based on the parameters in the command file above and has been verified through simulation. Set the Mc·BSP2 port to boot the serial E2PROM in SPI mode. text …… ; McBSP2 port SPI initialization, active mode STM #1000H, AR1; The first 10 words starting from 1000H are the program; Data before the code ST #08AAH, * AR1+ ; Boot header ST #0018H, * AR1+ ST #0003H, * AR1+ ST #0800H, * AR1+ ST #D010H, * AR1+ ; Not important ST #000lH, * AR1+ ST #0C428H, * AR1+ ; Main program address is 1C428H ST #2340H, * AR1+ ; Total number of program code words 2340H ST #000lH, * AR1+ ST #0C000H, * AR1+ ; Program start address 1C000H STM #(1000H+0AH+2340H), AR1 ST #0, * AR1; Finally, place the end flag #0000H STM #0, ADDRESS; Clear the address register STM #1000H, AR2; Start address of program code STM #(0AH+2340H+1), BRC RPTB LOOP; Write loop LDM ADDRESS, A SFTL A, -8 AND #0OFFH, A OR #0200H, A STLM A, AR3; Write instruction + high-order address LDM ADDRESS, A SFTL A, 8 AND #OFF00H, A LD * AR2, B SFTL B, -8 AND #0FFH, B ADD B, A STLM A, AR4; Low-order address + data byte LDM ADDRESS, A ADD #1. A STLM A, ADDRESS ；E2PROM address + 1 CALL WRITE ；Write E2PROM subroutine LDM ADDRESS, A SFTL A, -8 AND #00FFH, A OR #0200H, A STLM A, AR3 ；Write instruction + address high byte LDM ADDRESS, A SFTL A, 8 AND #0FF0H, A LD *AR2+． B；Program code address + 1 AND #0FFH, B ADD B． A STLM A, AR4 ；Address low byte + data byte LDM ADDRESS, A ADD #1, A STLM A, ADDRESS ；EOPROM address + 1 CALL WRITE ；Write EOPROM subroutine LOOP: NOP ． end [b]Conclusion[/b] The DSP field-programmable method introduced in this article has shown good results in practical applications, and its convenient and flexible features enhance the ability to handle field problems. Since it is entirely implemented in software, this method is also applicable to other brands of DSP products. Editor: He Shiping