Minimum System Design Based on ARM Microprocessor S3C4510B
2026-04-06 04:33:04··#1
1 Introduction ARM (Advanced RISC Machines) can be considered a company name, a general term for a class of microprocessors, or a technology name, commonly referred to as "Advanced Reduced Instruction Set Computer Machines." Currently, the number of devices using various ARM microprocessors far exceeds that of general-purpose computers. In the industrial and service sectors, digital machine tools, intelligent tools, industrial robots, and service robots using ARM microprocessors are gradually changing traditional industrial production and service methods. Therefore, the development and application of ARM microprocessors is becoming a trend in application technology in the data age. This article introduces the construction of the minimum system of the S3C4510B ARM microprocessor and provides the selection of related peripheral devices. [b]2 S3C4510B[/b] The S3C4510B is a high-performance 16/32-bit RISC microprocessor from Samsung Corporation of South Korea, designed for Ethernet application systems. It contains a low-power, high-performance 16/32-bit ARM7TDMI RISC processor core designed by ARM, making it ideal for price- and power-sensitive applications. The S3C4510B operates at 3.3V, has a maximum clock speed of 50MHz, and is packaged in a 208-pin QFP package. Its external data bus (bidirectional, 32-bit) supports external 8-bit, 16-bit, and 32-bit data widths; its 22-bit address bus can address 4M words (16M bytes) of address range for each ROM/SRAM group, FLASH memory group, DRAM group, and external I/O group. This microprocessor has 37 built-in 32-bit registers (31 general-purpose registers and 6 status registers). Whether a register is accessible at any given time depends on the processor's current operating state and mode. A single S3C4510B has the following on-chip peripheral functional modules: an external bus controller with bus request/acknowledge pins; a 32-bit system bus arbiter; an integrated instruction/data cache (8KB) configurable as internal SRAM; an IIC interface supporting only master control mode; an Ethernet controller; two HDLC (High-Level Data Link Control) channels with buffered descriptors; a DMA controller; two UART modules that can operate in DMA or interrupt mode; two programmable 32-bit timers; 18 programmable I/O ports; an interrupt controller with 21 interrupt sources; and a PLL circuit. [b]3 Hardware Design[/b] 3.1 Minimum System Design The minimum system consists of the basic circuits necessary to ensure reliable operation of the microprocessor. The minimum system of the S3C4510B consists of the S3C4510B, power supply circuit, crystal oscillator circuit, reset circuit, and JTAG interface circuit. Their connection relationship is shown in Figure 1. 3.1.1 Power Supply Circuit In this system, the S3C4510B and some peripheral devices require a 3.3V power supply. Additionally, some devices require a 5V power supply. To simplify the power supply circuit design, the input voltage of the entire system must be a 5V DC regulated power supply. To obtain a reliable 3.3V voltage, the LT1085CT-3.3 DC-DC converter manufactured by Linear Technology is selected. It has an input voltage of 5V, an output voltage of 3.3V, and an output current of up to 3A. The power supply circuit is shown in Figure 2. 3.1.2 Crystal Oscillator Circuit This circuit provides the operating clock for the S3C4510B and other circuits. Given that active crystal oscillators offer superior reliability and accuracy compared to passive crystal oscillators, an active crystal oscillator is used in this system. Based on the S3C4510B's maximum operating frequency and the PLL circuit's operating mode, a 10MHz active crystal oscillator is selected. Its frequency, after being multiplied by the S3C4510B's internal PLL circuit, can reach a maximum of 50MHz. The internal PLL circuit combines frequency amplification and signal purification functions, allowing the system to achieve a higher operating frequency with a lower external clock signal. The crystal oscillator circuit is shown in Figure 3. 3.1.3 Reset Circuit This circuit primarily performs the system's power-on reset and user button reset functions during system operation, aiding in program debugging. The IMP708TCSA reset circuit from IMP Corporation is selected here. It operates at 3.3V and has one manual reset input pin and two reset output pins (one active high and one active low), meeting the requirements of different reset signals. The reset circuit is shown in Figure 4. 3.1.4 JTAG Interface Circuit JTAG (Joint Test Action Group) is an international standard test protocol primarily used for internal chip testing and system simulation and debugging. JTAG technology is an embedded testing technology. The JTAG interface allows access to all components within the chip, providing a simple and efficient means of developing and debugging embedded systems. It has two connection standards: a 14-pin interface and a 20-pin interface. The 14-pin interface standard is selected here. The JTAG interface circuit is shown in Figure 5. After designing the above four circuit parts, the S3C4510B will have the basic conditions for safe and reliable operation. 3.2 Peripheral Outlet Interface Design The design of the minimum system is to better serve the research and development of microprocessors. Therefore, some necessary pins of the microprocessor should be brought out using interface sockets to facilitate experimental development. The following will introduce typical pins that need to be brought out by module and give the corresponding circuit selection. 3.2.1 The pins required for the FLASH memory module are ADDR[21:0], XDATA[31:0], nRCS0, nOE, nWBE0, and nRESFT. The recommended circuit is the TE28F320B produced by Intel, which has a storage capacity of 32M bits (4M bytes), an operating voltage of 2.7V-3.6V, and uses a 48-pin TSOP package or a 48-pin FBGA package with a 16-bit data width. 3.2.2 The required pins for the SDRAM module are ADDR[21:0], XDATA[31:0], nSDCS0, nDWE, nSDRAS, nSDCAS, nWBE0, nWBE1, SDCLK, and CKE. The recommended circuit is the Winbond W986416DH, which has a storage capacity of 4 groups × 16M bits (8M bytes), an operating voltage of 3.3V, a common package of 54-pin TSOP, is compatible with LVTTL interface, supports automatic refresh and self refresh, and has a 16-bit data width. 3.2.3 The required pins for the Ethernet interface module are TX_ERR, TXD[3:0], TX_EN, TX_CLK, RX_ERR, RXD[3:0], RX_CLK, RX_DV, RX_ERR, nRESET, CRS, and COL. The recommended interface circuit is the DM9161 from Davicom, a single-port high-speed Ethernet physical layer interface circuit that provides both MII and traditional 7-wire network interfaces, operating at 3.3V. 3.2.4 The required pins for the I2C interface module are SCL and SDA. An external AT24C01 from Atmel is used as the I2C interface module's memory, operating at 5V and providing 128 bytes of EEPROM storage space to store a small amount of data that needs to be saved when the system loses power. 3.2.5 The required pins for the real-time clock module are E_ADDR3, SCL, and SDA. The PCF8583 from Philips is a low-power CMOS real-time clock/calendar interface circuit, operating at 3.3V, with 256 bytes of built-in SRAM. It communicates with external devices via the I2C interface, and the built-in address register automatically increments after each read and write operation. 3.2.6 The required pins for the ADC module are E_ADDR0, E_ADDR1, E_ADDR2, E_nWBE0, E_nOE, nADC_CS, and ADC_CLK. The National ADC0809 is an 8-bit, 8-channel successive approximation A/D converter operating at 5V, featuring high speed, high precision, low temperature dependence, and low power consumption. 3.2.7 The required pins for the DAC module are E_D[7:0] and nDAC_CS. The National DAC0832 is an 8-bit CMOS D/A converter operating at 5V, consisting of an 8-bit input register, an 8-bit DAC register, an 8-bit D/A converter, and conversion control circuitry. Its two-level registers enable synchronous conversion output of multiple D/A channels. 3.2.8 The general-purpose I/O interface module pins P0-P3 can be connected to external jumpers to select high or low levels for status input or other input functions; pins P4-P7 can be connected to external LEDs for displaying program running status or other output displays. The above only lists the pins and circuits used in 8 modules. Other modules include serial interface modules, bus driver modules, decoding modules, LED/LCD display modules, and keyboard modules, which will not be listed here. The E_xxx pins mentioned above are pins after bus driving and level conversion circuitry. Such circuits include TI's N74ALVC16245 (dual 8-channel) and SN74LVC4245 (channel). 4. Hardware Debugging After the system is powered on, the power supply circuit output voltage is DC 3.3V; the active crystal oscillator output frequency is 10MHz; the output of the reset circuit (taking the low-level active pin as an example) is high when the button is not pressed, low when the button is pressed, and returns to high when the button is released. When debugging the S3C4510B via the JTAG interface, before powering on, check whether the nEWAIT pin is pulled up and the ExtMREQ pin is pulled down. The handling of these two pins is crucial for the S3C4510B to function properly and must be carefully considered. After power-on, if the MCLKO/SDCLK pins output a 50MHz waveform with the on-chip PLL circuit enabled, it indicates that the S3C4510B is working normally. At this point, the integrated development tools ADS or SDT can be used to access and control the components within the circuit via the JTAG interface. For example, by manipulating the special function registers of the internal control general-purpose I/O ports, LEDs connected to ports P4-P7 can be lit. If the LEDs switch normally according to the register settings, it indicates that the designed minimum system is reliable. 5. Conclusion ARM microprocessors will compete with high-end MIPS and PowerPC embedded microprocessors with their excellent performance and extremely low power consumption. It is foreseeable that ARM microprocessors will continue to dominate the 32-bit embedded microprocessor market for some time to come. Learning and mastering ARM microprocessor technology is essential, and designing an ARM microprocessor minimum system is an excellent way to learn this technology. Editor: He Shiping