Introduction With the rapid development of China's economy, the demand for private cars and buses is increasing. Correspondingly, after China's accession to the WTO, its economy and trade have become more integrated with the world, and tariffs on automobiles have been significantly reduced, making cars affordable for many and no longer a dream. However, the surge in private cars and buses undoubtedly puts heavy pressure on China's transportation system. Looking at major cities in China today, such as Guangzhou, Hong Kong, and Shanghai, all are plagued by traffic congestion. For China to develop, its transportation sector must not stagnate. Therefore, China's traffic control system should be improved with a focus on humanization and intelligence. This paper takes this as its starting point and provides a detailed introduction to a traffic light model controlled by a microcontroller. The traffic light model controlled by a microcontroller with wireless transceiver can be divided into four parts: a power supply circuit, a microcontroller main control circuit, a wireless transceiver control circuit, and a display circuit, as shown in Figure 1. Since the display part uses three-color LEDs and digital tubes for simulation, it is relatively simple and will not be described in detail here. The following mainly describes the composition and principle of the microcontroller main control circuit and DC power supply. I. Microcontroller Main Control Circuit 1. Introduction of Main Components The main component of the microcontroller main control circuit is the AT89C51, whose appearance is shown in Figure 2. The AT89C51 is a low-voltage, high-performance CMOS 8-bit microcontroller. It contains 4k bytes of erasable programmable read-only memory (PEROM) and 128 bytes of random access memory (RAM). The device is manufactured using Atmel's high-density, non-volatile memory technology and is compatible with the standard MCS-51 instruction set. It integrates a general-purpose 8-bit central processing unit and Flash memory, providing a cost-effective solution with its powerful built-in microcomputer. The AT89C51 is a low-power, high-performance microcontroller with 40 pins, 32 external bidirectional input/output (I/O) ports, two external interrupt ports, two 16-bit programmable timer/counters, and two full-duplex serial communication ports. The AT89C51 can be programmed using conventional methods or in-system programming. It combines a general-purpose microprocessor and Flash memory, especially the rewritable Flash memory, which effectively reduces development costs. 2. Pin Description: VCC: Power supply voltage. GND: Ground. P0 Port: P0 is an 8-bit open-drain bidirectional I/O port, each pin can sink 8 TTL gate currents. When a pin of P0 is first written with a 1, it is defined as a high-impedance input. P0 can be used for external program data memory; it can be defined as the eighth bit of the data/address. During FLASH programming, P0 serves as the original code input port. When FLASH is verified, P0 outputs the original code; at this time, P0 must be pulled high externally. P1 Port: P1 is an 8-bit bidirectional I/O port with internally provided pull-up resistors. The P1 port buffer can receive and output 4 TTL gate currents. After a 1 is written to a pin of P1, it is internally pulled high and can be used as an input. When P1 is externally pulled low, it will output current due to the internal pull-up. During FLASH programming and verification, port P1 receives the eighth address bit. Port P2: Port P2 is an 8-bit bidirectional I/O port with internal pull-up resistors. The P2 port buffer can receive and output four TTL gate currents. When a "1" is written to P2, its pin is pulled high by the internal pull-up resistor and acts as an input. Therefore, when used as an input, if the P2 pin is pulled low externally, it will output current. This is due to the internal pull-up. When used for accessing external program memory or 16-bit address external data memory, P2 outputs the high eight bits of the address. When an address "1" is given, it utilizes the internal pull-up advantage. When reading or writing to external 8-bit address data memory, P2 outputs the contents of its special function register. Port P2 receives the high eight address bits and control signals during FLASH programming and verification. Port P3: Port P3 has eight bidirectional I/O pins with internal pull-up resistors, capable of receiving and outputting four TTL gate currents. When a "1" is written to port P3, it is internally pulled high and used as an input. As an input, due to the external pull-down to low level, port P3 will output current (ILL) due to the pull-up. Port P3 can also be used as some special function ports of the AT89C51, as shown in the table below: Port Pin Alternate Functions P3.0 RXD (Serial Input) P3.1 TXD (Serial Output) P3.2 /INT0 (External Interrupt 0) P3.3 /INT1 (External Interrupt 1) P3.4 T0 (Timer 0 External Input) P3.5 T1 (Timer 1 External Input) P3.6 /WR (External Data Memory Write Strobe) P3.7 /RD (External Data Memory Read Strobe) Port P3 also receives some control signals for flash programming and programming verification. ST: Reset Input. When the oscillator resets the device, the RST pin must be held high for two machine cycles. ALE/PROG: When accessing external memory, the address latch enable output level is used to latch the low-order byte of the address. During FLASH programming, this pin is used to input programming pulses. Normally, the ALE pin outputs a positive pulse signal at a constant frequency, which is 1/6 of the oscillator frequency. Therefore, it can be used as a pulse for external output or for timing purposes. However, note that whenever it is used for external data memory, one ALE pulse will be skipped. To disable ALE output, set the SFR8EH address to 0. In this case, ALE only works when executing MOVX and MOVC instructions. Additionally, this pin is slightly pulled high. If ALE is disabled in external execution mode, setting this bit has no effect. /PSEN: External program memory strobe signal. During instruction fetching from external program memory, /PSEN is active twice per machine cycle. However, these two active /PSEN signals will not appear when accessing external data memory. /EA/VPP: When /EA is held low, external program memory (0000H-FFFFH) is accessed during this period, regardless of whether internal program memory is available. Note that in encryption mode 1, /EA internally locks to RESET; when /EA is held high, internal program memory is accessed during this period. During FLASH programming, this pin is also used to apply a 12V programming power supply (VPP). XTAL1: Input to the inverting oscillator amplifier and input to the internal clock circuit. XTAL2: Output from the inverting oscillator. 3. The system simulates the following traffic conditions: (1) Under normal circumstances, lanes A and B (which intersect to form a crossroads, with A being the main lane and B being the side lane) are allowed to pass in turn. Lane A is allowed to pass for 60 seconds (the two digital tubes count down from 60 seconds, with 5 seconds used for warning), and lane B is allowed to pass for 30 seconds (the two digital tubes count down from 30 seconds, with 5 seconds used for warning). (2) When there are vehicles in one lane and no vehicles in the other lane (simulated by push-button switches S1 and S2), the lane with vehicles is allowed to pass. (3) When an emergency vehicle passes by (simulated by push-button switch S0), both lanes A and B are red (the two digital tubes display 00). 4. Design Ideas (1) Under normal circumstances, the main program runs, and various timing timers are implemented by repeatedly calling the 0.5-second delay subroutine; (2) When there is a car in one lane and no car in the other lane, the external interrupt 1 method is used to enter the corresponding interrupt service routine, and the interrupt is set as a low priority interrupt; (3) When an emergency vehicle passes by, the external interrupt 0 method is used to enter the corresponding interrupt service routine, and the interrupt is set as a high priority interrupt, thus realizing interrupt nesting. 5. Hardware Design As shown in Figure 3, the digital display board on the traffic light is simulated using digital tubes. The seven segments of the digital tube are controlled by the P0 (P0.0-P0.6) port of the AT89C51, and the two digital tubes are selected by the P2 (P2.0-P2.1) port, with a PNP transistor as the driving tube in the middle. The vehicle detection signals of lanes A and B are simulated by S1 and S2 respectively. When S1 and S2 are high level (no button is pressed), it indicates that there is a car; when S1 and S2 are low level (button is pressed), it indicates that there is no car. When S1 and S2 have different values, it indicates that one lane has a vehicle and the other does not. The signal passes through 74LS04 and 74LS86 and is input to port P3.3, triggering external interrupt 1. After checking, the AT89C51 microcontroller allows passage in the lane with a vehicle, displaying a green light; it prohibits passage in the lane without a vehicle, displaying a red light. When S0 is low (button pressed), external interrupt 0 is triggered. After checking, the microcontroller prohibits passage in both lanes, displaying red lights and a digital tube showing 00, allowing emergency vehicles to pass. II. Power Supply Circuit As shown in Figure 3, a +5V DC power supply is required for the AT89C51 microcontroller's operating power supply, diodes, and digital tube drivers. Therefore, a stable and continuous +5V DC power supply is crucial for this system. This system uses a bridge rectifier circuit to convert AC to DC, providing a constant +5V DC to all circuit components. The analog and digital sections are each powered by an independent Zener diode to ensure circuit stability and anti-interference. The circuit diagram is shown in Figure 4. 1. Introduction to Main Components: DB is a full-wave rectifier bridge, its internal structure is shown in Figure 5. Its working principle is as follows: Terminals 1 and 3 of the bridge are connected to the AC power supply, and terminals 2 and 4 are DC output terminals. At a certain moment, the instantaneous AC value is positive (+) and negative (-) (i.e., terminal 1 is positive, terminal 3 is negative). Current enters from terminal 1, flows through the diode between terminals 1 and 2 to terminal 2, then through the load between terminals 2 and 4 to terminal 4, and then flows back to the negative AC terminal through the diode between terminals 3 and 4; similarly, current flows in from terminal 3 and flows back to the negative AC terminal from terminal 1. 2. Working Principle of the Power Supply Circuit: The approximately 9V AC voltage input from interface J1 (waveform shown in Figure 7) is rectified by the full-wave rectifier bridge DB to obtain a fluctuating DC voltage of approximately 0-8V (as shown in Figure 8). This fluctuating DC current is filtered by C1, C2, and C3 to obtain a relatively stable DC current. This is then regulated to +5V by an LM7805, and filtered again by C4 to obtain a stable +5V DC current (as shown in Figure 9), which powers the system's radio receiver module and the PT2272 decoding chip. Q1 is a relay driver transistor. When its base receives a high level from the decoding chip, the relay is activated, K1 is turned on, and the voltage, after being regulated by the 7805, powers the AT89C51. III. Radio Remote Control Transceiver Control Circuit: The wireless transmission and reception control consists of two parts, as shown in Figure 10. The transmitting part uses the PT2262 encoding chip and the DF data transmission module, while the receiving part mainly consists of the PT2272 decoding chip and the DF receiving module. To simplify the circuit, readily available transceiver chips are used in the transmitting and receiving parts. These chips operate at a frequency of 315MHz and use FM modulation. S1-S4 are pulse code switches. When pressed, they output corresponding levels after decoding at the receiving end to control the power-on circuit and the operation of the electronic switch composed of Q9-Q11. 1. Introduction to the PT2262 Encoding Chip Principle: The PT2262/2272 is a low-power, low-cost general-purpose encoding and decoding circuit manufactured by Taiwan's Pucheng Corporation using CMOS technology. The PT2262/2272 can have up to 12 tri-state address pins (A0-A11) (floating, high, low), which can be combined to provide 531441 address codes. The PT2262 can have up to 6 data pins (D0-D5). The set address code and data code are serially output from pin 17 and can be used in wireless remote control transmitting circuits. 2. Introduction to the PT2272 Decoding Chip Principle: The encoded signal emitted by the PT2262 encoding chip consists of an address code, a data code, and a synchronization code, forming a complete codeword. After receiving the signal, the PT2272 decoding chip compares and verifies the address code twice before outputting a high level on pin VT. Simultaneously, the corresponding data pin also outputs a high level. If the transmitting end continuously presses and holds a button, the encoding chip will continue to transmit. When no button is pressed on the transmitter, the PT2262 is not powered on, and its pin 17 is low, so the 315MHz high-frequency transmitting circuit does not work. When a button is pressed, the PT2262 is powered on, and its pin 17 outputs a modulated serial data signal. When pin 17 is high, the 315MHz high-frequency transmitting circuit oscillates and transmits a constant-amplitude high-frequency signal. When pin 17 is low, the 315MHz high-frequency transmitting circuit stops oscillating. Therefore, the high-frequency transmitting circuit is completely controlled by the digital signal output from pin 17 of the PT2262, thus performing amplitude keying (ASK modulation) on the high-frequency circuit, equivalent to 100% amplitude modulation. IV. Software Design Process: The main program uses polling timing, with register R2 determining the number of times the 0.5S delay subroutine is called to obtain various traffic light times. The subroutine uses Timer 1 mode 1, polling timing, with the timer setting 50ms. Register R3 determines the loop count of 10 times to obtain the 0.5S delay time. The interrupt service routine for one intersection with a vehicle while the other is empty first needs to save the context, requiring a delay subroutine and port P1. Therefore, registers R3, P1, TH1, and TL1 need to be saved. During context saving, interrupts must be disabled to prevent program corruption caused by high-priority interrupts (interrupts generated by emergency vehicle passage). Then, interrupts are disabled, the context is restored, interrupts are re-enabled, and the program returns to the main program. The interrupt service routine for an emergency vehicle also needs to save the context, but interrupts do not need to be disabled (as it is a high-priority interrupt). The corresponding service is then executed, and a 20-second delay is performed after the traffic light signal appears to ensure the emergency vehicle can pass through the intersection. Then, the context is restored, and the program returns to the main program. The flowchart of the main program and interrupt service routines of the traffic light simulation control system is shown below. Emergency Interruption Service Procedure (INT0) V. System Improvements 1. The system could be equipped with a thermal detector to detect the heat radiated from the vehicle's internal combustion engine, allowing the microcontroller to determine which lanes have vehicles and which are empty, enabling a rapid response to road traffic conditions and improving traffic efficiency. 2. The system should be equipped with an infrared receiver, and correspondingly, emergency vehicles (such as fire trucks and ambulances) should be equipped with infrared emitters. This way, from a distance from traffic lights, emergency vehicles can activate the infrared emitters to make all traffic lights turn red, avoiding unnecessary casualties and financial losses due to traffic problems. 3. The system could be equipped with a dot-matrix LED Chinese display screen to display temperature, weather conditions, air quality index, etc., facilitating drivers' understanding of external conditions. Adding these functions will undoubtedly increase costs, but it will indeed improve traffic efficiency, alleviate traffic congestion, and avoid unnecessary losses. VI. Attached are the microcontroller source code, hardware design schematics, and physical hardware. [b]VII. Conclusion[/b] Now that my country has successfully bid to host the 2008 Olympic Games and the 2010 Asian Games, people from all over the world will gather in my country, which will inevitably put some pressure on our transportation system. If my country manages its transportation well, it will not only leave wonderful memories for travelers from all over the world, but also indirectly enhance my country's international competitiveness and improve our international standing. **VIII. References** 1. Liu Shouyi (ed.), *Microcontroller Application Technology*, Xi'an University of Electronic Science and Technology Press, 2004. 2. FM Diy Network (http://www.fmdiy.com), 2003-2005. Editor: He Shiping