Many electronics engineers start by designing circuit boards. Some people may find this job tedious and lacking in technical content, while others extract insights and ideas from the details and gradually find their way to becoming experts.
1. The filter capacitor should be placed as close as possible to the chip's power supply, and the same applies to the oscillator. A resistor should be placed at the front end of the oscillator.
2. Change the board size in the BoardShape section of Design.
3. Components, vias, pads, copper pours, and text can all be placed using the shortcut P+L.
4. After drawing, you need to specify the KeepOut-Layer layer, i.e., the P+L routing layer.
5. Before placing polygon pours, you need to modify the safety clearance design rules (clearance around 16mil). Note that Hatched is generally used, and the NET network is connected to ground (GND). Select pouralisamenetprojects, and you also need to remove dead copper.
Additional information: When applying copper layers, pay attention to the power and ground planes. Because the traces in an FPGA are only 6mil, the rule->clearance should be set to 6mil before applying copper. When applying copper to other layers, it's best to increase the rule->clearance to around 16mil, then change the rule back. At this point, the Track is 8mil and the Grid is 24mil.
6. When applying copper to the top and bottom layers, pay attention to Track 12mil and Grid 24mil.
7. Ground and power lines generally need to be very thick, 60-80 mil, with a normal minimum line width of 10 mil, and 6 mil for FPGAs.
8. Use S+L for cabling operations and P+M for wiring. Use "<" and ">" to adjust spacing. Use P+L to lay wires, especially when specifying a particular layer, such as a layer where wiring is prohibited.
9. Use the numeric keypad with the plus and minus signs (+ and -) to switch between different levels. Page Up zooms in, and Page Down zooms out.
10. Distance measurement R+M, switch between mil and millimeter (mm) using the Q key.
11. When placing components: X is symmetrical left and right, Y is symmetrical top and bottom, SPACE is flipped 90 degrees, and the Tab key is used to view component properties.
12. When drawing the package diagram, J+L is used for Jump to Location to locate a specific point.
13. The base point is drawn in the Display of Preference's PCB, under OriginMaker.
14. When drawing PCB footprints, you can use queues to paste P+S.
15. When importing PCB updates, you need to update in the schematic. To do this, you can uncheck "Change Schpins" in Project -> Options -> Options if you don't want to change the schematic pin order. This is frequently used in interactive routing, but please note:
Sometimes, updating just one component requires manually locating both the netmark and the component itself; avoid updating everything.
16. During processing, solder resist (green surface) is generally applied, and screen printing (displaying device identification) is used. The board thickness is generally 1.5-2mm.
17. PCB footprint diagrams should be drawn in the TopOverLayers (yellow).
Replenish:
18. An inductor (around 10mH) should generally be added between the analog power supply and the general power supply to eliminate signal interference, and two 0.1uF capacitors should be added for filtering.
19. The analog reference input terminal AREF of the microcontroller should be filtered by an electrolytic capacitor and connected to analog ground. A resistor should be added between analog ground (AGND) and general ground (GND), and a capacitor (0.1uF) should be added between the positive and negative analog reference input terminals for filtering.
20. Automatic labeling is done using Tools--AnnotateSchematics
21. When drawing schematic diagrams of components, make good use of component arrangement rules, such as placing input pins on the left, output pins on the right, power supplies on top, and ground pins on the bottom.
22. When drawing schematic libraries, you can use parts to design chips with a large number of pins.
23. A low level can cause a horizontal line to appear above the letter to indicate its position.
24. First select multiple pads, press S, then add component connection, then Multiple traces, select the components, and press the ~ key.
25. When laying out a PCB, you must first set rules (very important). The rules must include Via, Clearance, etc.
26. Shift+S to view all wiring in a single layer, Ctrl+right mouse button+drag = zoom in or zoom out, which is very useful for multi-layer wiring.
27. When there are many repetitive components, use the Align function to arrange them. Select the components you want to arrange, and use the shortcuts Shift+Ctrl+H for horizontal uniformity, Shift+Ctrl+V for vertical uniformity, Shift+Ctrl+T, and Shift+Ctrl+B.
28. Move the component to the bottom layer: Select the component, press L
29. When designing a PCB, if components or vias appear in green, use the rules in Design->Rules to check where the problem is.
30. Group Operation: Select all the devices you want to operate on, then use Shift + left mouse button to double-click one of the devices to set its properties.
31. To convert schematics or PCB layouts to PDF format: File -> SmartPDF -> Select the path and settings to obtain the schematic in PDF format.
32. In a project, all schematic diagrams use interconnected net symbols. To use both the overall diagram and sub-diagrams, select Design->CreateSheetSymbolFromSheetorHDL.
Replenish:
1. To add a signal layer, use Design->LayerStackManager, select the topLayer, and then add.
2. Fan-out function: For FPGA multi-pin devices, go to AutoRoute->Fanout->component, then select the device you want to fan out, and check the boxes as needed.
3. After changing the PCB pin order, you need to decompile to the schematic. Go to Project->ProjectOption->options and uncheck the "Changing SchematicPins" option. Then go to Design->UpdateSchmeticsinxx.ProPCB.
4. Interactive routing: This involves changing the pin order. Note the following:
a. First, configure the swappable pins: Tools->pin/PartSwapping->configure. Select the chip you want to swap, such as FPGA, and then select the swappable IO pins. Do not select clock and some configuration pins such as nCSO, nCE, ASDO, DATA0, etc., as these cannot be swapped. ShowAssignIOpinOnly, and then add them to a group, such as the Type group.
b. Make sure to check the "PinSwap" box to allow pin swapping.
c. Tools -> Pin/PartSwapping -> Interactive Pin/Netswaping (shortcut key TWI)
5. Notes on multi-layer board installation:
a. FPGA internal linewidth: 6mil (this depends on the minimum spacing between pins in the FPGA!). Vias size: outer diameter 20mil, inner diameter 8mil. Power vias: outer diameter 50mil, inner diameter 20mil.
b. Equal-length routing: For applications with strict clock synchronization requirements, equal-length routing is necessary. View the PCB (View -> Workspace Panels -> PCB -> PCB). Divide the nets to be routed into groups for easier observation of line lengths (double-click AllNet to add a group of nets). Go to Tools -> Interactive Length Tuning (shortcut key TR). Select a line in the net and use Tab to add more nets. Then find the longest line in the net and perform equal-length routing. Before this, ensure the wires are properly connected and have sufficient space.
c. Differential Lines: Differential lines are required for DVI interfaces. Go to View -> Workspace Panels -> PCB -> PCB, then select Differential Pairs Editor to create the differential lines you want to route. Alternatively, you can first mark them in the schematic, then use Tools -> Interactive Diff Pair Longest Tuning (shortcut key TI), select a line, and press Tab to route the longest possible line.
d. Pressing S+N allows you to select the entire network, which is helpful for deletion.
e. To fix the device, double-click and select "locked".
Supplement 2:
1. It must be said that the final inspection of the board is extremely important, especially the unrouted inspection. The power and ground checks before soldering are also crucial; don't make a big mistake.
2. Pressing L in the PCB layout allows you to directly edit the display and hiding of each layer.
3. Use crisscrossing wiring as much as possible to reduce signal interference.
